The Structure of the “The” –Multiprogramming System Edsger W. Dijkstra Presented By: Nick Tyrrell

Paper Introduction May, 1968 Response to a call for papers on timely research and development efforts Six person team 3 Guiding Principles Select an ambitious project Select a machine with a good basic design Experience != Wisdom

EL X8 32K core memory 512K words drum size Good peripheral and interrupt control Several low capacity channels Tape readers/writers, printers, etc Lack of other awkward features

The System Goals Quick turn-around for short term programs Economic peripheral use Economic backing store and processor use Flexibility as a general purpose computer

System Survey Storage Allocation Processor Allocation System Hierarchy Semaphores System Hierarchy

Storage Allocation Prior system implementations used core memory for page-wise access to information Segments Hold the information Can be on any page in memory Location discovered via segment variables in core memory

Storage Allocation cont… This approach reduces drum allocation time Allows for flexible program storage

Processor Allocation Society of sequential processes User programs Input peripherals Output peripherals Segment controller Message Interpreter This society requires synchronization

Semaphores Integer variable initialized to 1 or 0 Atomic Methods P() decrements variable and places process on a waiting list if new value is negative V() increments variable and removes a process from waiting list if new value is non-positive

Semaphores cont… Example mutex = 1; P(mutex); critical section V(mutex);

Private Semaphores Same as semaphores except only one process will ever perform a P() operation (block) on it while other process can perform a V() (signal) operation on it Allowed values are -1,0,1

Private Semaphores Used to block process while configuring environment There is a free reader, and a process needing a reader. Block while the connection is made Resume after connection

System Hierarchy Levels of abstraction Processor Allocation Segment Control Message Interpreter Input and Output Buffering Independent-user Programs The Operator

Processor Allocation Level Process Scheduling Real-Time clock interrupt handler Prioritization Above this level, individual processor identity is lost

Segment Controller Separate process Drum interrupt handler Provides bookkeeping for backing store Above this level, pages lose their identity and all information is accessed via segment addressing

Message Interpreter Keyboard interrupt handler Outputs a request to print the character to the printer Provides a communication mechanism between running processes and the user

Message Interpreter cont… Above this level, each process appears to have its own conversation consol One conversation at a time Multiple conversations are synchronized Also above this level, the teleprinter looses its identity

Input and Output Buffering Buffering of input streams Un-buffering of output streams Notifies the consol when a malfunction is detected Above this level, the I/O devices loose their individual identity

Other Levels The next level is represented by user programs User programs run on top of the prior Levels The final level is the Operator

Design Experience Two main mistakes Assuming a “perfect installation” No thought to debugging during design The system was proven logically sound prior to construction

Design Experience cont… Conception Took a long time Construction Plain machine code Verification Testing was done from the bottom level up Each level was exhaustively tested prior to the next

Dijkstra’s Conclusion Nothing new in program verification Effective structuring minimizes testing He hopes industry will follow this example