Edge-Based Circuits DIGI-260 ©Paul R. Godin prgodin @ gmail.com

Schmitt-Triggering Schmitt triggered devices respond with an abrupt transition on the output logic, even with a relatively long edge as the input. Standard gates typically respond with a relatively soft edge on the output.

Schmitt-Triggering Schmitt-triggered devices have two absolute threshold voltages: VT - : Logic Low threshold voltage where if the input voltage drops below this level, the input is seen as a logic low. VT + : Logic High threshold voltage where if the input voltage climbs above this level, the input is seen as a logic high.

Schmitt Triggering The two threshold voltages are separated. The difference is described as “delta-V”, or ΔV. Within this zone, the existing logic state is held until the threshold for the other logic state is crossed. If the input is a logic low, this logic low will be held until the upper voltage threshold is crossed. Once the input is a logic high, this state will be held until the lower voltage threshold is crossed. These devices require an extra degree of change to overcome the present state, known as hysteresis. hysteresis symbol

Applications for Schmitt-Triggered Devices Oscillators Analog to digital converters (threshold voltage) Edge signal conditioning Noise reduction Edge detectors Reset on power-up See www.fairchildsemi.com/an/AN/AN-140.pdf

Vt+ and Vt- Rising Input Voltage Logic Low (0V) High (5V) Detected Input Logic State Transition (Logic 0 to Logic 1) (Vt+) If an input rises from a logic low toward a logic high, eventually the input would detect a transition from a low input to a high input state. This voltage is VT+.

Vt+ and Vt- Falling Input Voltage Logic High (5V) Similarly, if an input falls from a logic high toward a logic low, eventually the input would detect a transition from a high input to a low input state. This voltage is VT -. Falling Input Voltage Logic Low (0) Detected Input Logic State Transition (Logic 1 to Logic 0) (Vt-)

Vt+ and Vt- There is a separation between the Vt+ and the Vt- points. Input There is a separation between the Vt+ and the Vt- points. Vt+ Vt- Gate Input 1 Inverter Gate Output

Converting a sine wave to a square wave Use a Schmidt triggered gate Input 0V to +5V (positive offset on AC voltage input). +5V 0V

Edge Detector Edge Detector

Edge Detection Edge detectors are circuits that produce an output pulse only when an output edge is detected. This output pulse can then be used to enable a device for a period of time. When the pulse is applied to a gated latch, the device becomes an edge-triggered Flip- Flop.

Propagation Delay Edge Detector

Exercise 1 Create an EWB circuit with a Schmitt trigger- based edge detector. Analyse the output.

RC-Based Edge Detection

Exercise 2 Use EWB to analyse the RC-Based Edge Detector

Questions On an RC Edge-detection circuit: What is the time relationship between E and VR / VC ? On which edge(s) will VR exhibit a voltage? What is the reason that VR will exhibit a peak-to- peak voltage higher that the applied voltage E? What happens to the negative voltage? How can the pulse width be modified?

Exercise 3 Create an edge-triggered D Flip-Flop using only NAND gates.

END ©Paul R. Godin prgodin @ gmail.com