Introduction to Computer Architecture Dr. Hadi AL Saadi Faculty Of Information Technology University of Petra 2/23/2019 Dr. Hadi Hassan Computer architecture

Dr. Hadi Hassan Computer architecture Why take Computer Architecture ? You want to be called “Computer Scientist” You want to become an “expert” on computer hardware You want to become a “computer system designer” You want to become a “software designer” and need to understand how to improve code performance Technology is improving rapidly  new opportunities Has never been more exciting! Impacts Electrical Engineering and Computer Science 2/23/2019 Dr. Hadi Hassan Computer architecture

Dr. Hadi Hassan Computer architecture Goals • Understand how we express programs to the computer. The stored-program model The instruction set architecture ( ISA ) • Learn to read and write MIPS assembly • You will implement a subset of MIPS • Learn to “see past your code” to the ISA Be able to look at a piece of C code and know what kinds of instructions it will produce. Begin to understand the compiler’s role Be able to roughly estimate the performance of code based on this understanding 2/23/2019 Dr. Hadi Hassan Computer architecture

What is Computer Architecture? The science and art of designing, selecting, and interconnecting hardware components and designing the hardware/software interface to create a computing system that meets functional, performance, energy consumption, cost, and other specific goals. Operating System Application (AI,DB Graphics ) Programming Language, complier Application Trends Software Architect/ microarchitect’s view: How to design a computer that meets system design goals. Choices critically affect both the SW programmer and the HW designer Instruction Set Architecture (ISA) How does an assembly program end up executing as digital logic? What happens in-between? How is a computer designed using logic gates and wires to satisfy specific goals? Microarchitecture System architecture VLSI / Hardware Implementation Technology Trends Hardware 2/23/2019 Dr. Hadi Hassan Computer architecture

Which Books will be Used? Computer Organization & Design The Hardware/Software Interface David Patterson and John Hennessy Morgan Kaufmann Publishers Third Edition (2005) Read the textbook in addition to the course slides References: MIPS32 Architecture Volumes I, II, and III are available online For more information about MIPS please visit https://www.youtube.com/watch?v=u5Foo6mmW0I&index=1&list=PL5b07qlmA3P6zUdDf-o97ddfpvPFuNa5A

Dr. Hadi Hassan Computer architecture What is “Computer Architecture” ? Computer Architecture = Instruction Set Architecture + Computer Organization Instruction Set Architecture (ISA) WHAT the computer does (logical view) HOW the ISA is implemented (physical view) 2/23/2019 Dr. Hadi Hassan Computer architecture

Dr. Hadi Hassan Computer architecture What is a computer? Simply put, a computer is a sophisticated electronic calculating machine that: Accepts input information, Processes the information according to a list of internally stored instructions and Produces the resulting output information. Functions performed by a computer are: Accepting information to be processed as input. Storing a list of instructions to process the information. Processing the information according to the list of instructions. Providing the results of the processing as output. What are the functional units of a computer? 2/23/2019 Dr. Hadi Hassan Computer architecture

Dr. Hadi Hassan Computer architecture The von Neumann Model Stores information: Instructions, Data Arithmetic and logic unit(ALU): Performs the desired operations on the input information as determined by instructions in the memory Input unit accepts information: Human operators, Electromechanical devices Other computers Output unit sends results of processing: To a monitor display, To a printer Control unit coordinates various actions Input, Output Processing 2/23/2019 Dr. Hadi Hassan Computer architecture

Information in a computer -- Instructions Instructions specify commands to: Transfer information within a computer (e.g., from memory to ALU) Transfer of information between the computer and I/O devices (e.g., from keyboard to computer, or computer to printer) Perform arithmetic and logic operations (e.g., Add two numbers, Perform a logical AND). A sequence of instructions to perform a task is called a program, which is stored in the memory. Processor fetches instructions that make up a program from the memory and performs the operations stated in those instructions. What do the instructions operate upon? 2/23/2019 Dr. Hadi Hassan Computer architecture

Information in a computer -- Data Data are the “operands” upon which instructions operate. Data could be: Numbers, Encoded characters. Data, in a broad sense means any digital information. Computers use data that is encoded as a string of binary digits called bits. 2/23/2019 Dr. Hadi Hassan Computer architecture

Dr. Hadi Hassan Computer architecture Input unit Binary information must be presented to a computer in a specific format. This task is performed by the input unit: - Interfaces with input devices. - Accepts binary information from the input devices. - Presents this binary information in a format expected by the computer. - Transfers this information to the memory or processor. 2/23/2019 Dr. Hadi Hassan Computer architecture

Dr. Hadi Hassan Computer architecture Memory unit Memory unit stores instructions and data. Recall, data is represented as a series of bits. To store data, memory unit thus stores bits. Processor reads instructions and reads/writes data from/to the memory during the execution of a program. In theory, instructions and data could be fetched one bit at a time. In practice, a group of bits is fetched at a time. Group of bits stored or retrieved at a time is termed as “word” Number of bits in a word is termed as the “word length” of a computer. In order to read/write to and from memory, a processor should know where to look: “Address” is associated with each word location. 2/23/2019 Dr. Hadi Hassan Computer architecture

Memory unit ( Contd…) Processor reads/writes to/from memory based on the memory address: Access any word location in a short and fixed amount of time based on the address. Random Access Memory (RAM) provides fixed access time independent of the location of the word. Access time is known as “Memory Access Time”. Memory and processor have to “communicate” with each other in order to read/write information. In order to reduce “communication time”, a small amount of RAM (known as Cache) is tightly coupled with the processor. Modern computers have three to four levels of RAM units with different speeds and sizes: Fastest, smallest known as Cache Slowest, largest known as Main memory.

Memory unit ( Contd…) Primary storage of the computer consists of RAM units. Fastest, smallest unit is Cache. Slowest, largest unit is Main Memory. Primary storage is insufficient to store large amounts of data and programs. Primary storage can be added, but it is expensive. Store large amounts of data on secondary storage devices: Magnetic disks and tapes, Optical disks (CD-ROMS). Access to the data stored in secondary storage in slower, but take advantage of the fact that some information may be accessed infrequently. Cost of a memory unit depends on its access time, lesser access time implies higher cost.

Arithmetic and logic unit (ALU) Operations are executed in the Arithmetic and Logic Unit (ALU). Arithmetic operations such as addition, subtraction. Logic operations such as comparison of numbers. In order to execute an instruction, operands need to be brought into the ALU from the memory. Operands are stored in general purpose registers available in the ALU. Access times of general purpose registers are faster than the cache. Results of the operations are stored back in the memory or retained in the processor for immediate use.

Output Unit Computers represent information in a specific binary form. Output units: - Interface with output devices. - Accept processed results provided by the computer in specific binary form. - Convert the information in binary form to a form understood by an output device. Output Unit Processor Memory Computer Real world Printer Graphics display Speakers ……

Control Unit Operation of a computer can be summarized as: Accepts information from the input units (Input unit). Stores the information (Memory). Processes the information (ALU). Provides processed results through the output units (Output unit). Operations of Input unit, Memory, ALU and Output unit are coordinated by Control unit. Instructions control “what” operations take place (e.g. data transfer, processing). Control unit generates timing signals which determines “when” a particular operation takes place.

How are the functional units connected? For a computer to achieve its operation, the functional units need to communicate with each other. In order to communicate, they need to be connected. Memory Input Output Processor Bus Functional units may be connected by a group of parallel wires. The group of parallel wires is called a bus. Each wire in a bus can transfer one bit of information. The number of parallel wires in a bus is equal to the word length of a computer

Organization of cache and main memory Processor Bus Cache Why is the access time of the cache memory lesser than the access time of the main memory?

Execution of an instruction Recall the steps involved in the execution of an instruction by a processor: Fetch an instruction from the memory. Fetch the operands. Execute the instruction. Store the results. Several issues: Where is the address of the memory location from which the present instruction is to be fetched? Where is the present instruction stored while it is executed? Where and what is the address of the memory location from which the data is fetched? ...... Basic processor architecture has several registers to assist in the execution of the instructions.

Basic processor architecture Address of the memory location to be accessed Processor Memory PC IR MDR Control ALU R(n-1) - R1 R0 MAR n general purpose registers Address of the next instruction to be fetched and executed. Data to be read into or read out of the current location General purpose registers Instruction that is currently being executed

Basic processor architecture Control Path Data MAR MDR Memory Processor Control path is responsible for: Instruction fetch and execution sequencing Operand fetch Saving results Data path: Contains general purpose registers Contains ALU Executes instructions

Registers in the control path Instruction Register (IR): Instruction that is currently being executed. Program Counter (PC): Address of the next instruction to be fetched and executed. Memory Address Register (MAR): Address of the memory location to be accessed. Memory Data Register (MDR): Data to be read into or read out of the current memory location, whose address is in the Memory Address Register (MAR).

Fetch/Execute cycle Execution of an instruction takes place in two phases: Instruction fetch. Instruction execute. Instruction fetch: Fetch the instruction from the memory location whose address is in the Program Counter (PC). Place the instruction in the Instruction Register (IR). Instruction execute: Instruction in the IR is examined (decoded) to determine which operation is to be performed. Fetch the operands from the memory or registers. Execute the operation. Store the results in the destination location. Basic fetch/execute cycle repeats indefinitely.

The Dataflow Model (of a Computer) Von Neumann model: An instruction is fetched and executed in control flow order As specified by the instruction pointer Sequential unless explicit control flow instruction Dataflow model: An instruction is fetched and executed in data flow order i.e., when its operands are ready i.e., there is no instruction pointer Instruction ordering specified by data flow dependence Each instruction specifies “who” should receive the result An instruction can “fire” whenever all operands are received Potentially many instructions can execute at the same time Inherently more parallel

Von Neumann vs Dataflow Consider a von Neumann program What is the significance of the program order? What is the significance of the storage locations? Which model is more natural to you as a programmer? + *2 - * a b z Dataflow v <= a + b; w <= b * 2; x <= v - w y <= v + w z <= x * y Sequential

Memory Organization Recall: Information is stored in the memory as a collection of bits. Collection of bits are stored or retrieved simultaneously is called a word. Number of bits in a word is called word length. Word length can be 16 to 64 bits. Another collection which is more basic than a word: Collection of 8 bits known as a “byte” Bytes are grouped into words, word length can also be expressed as a number of bytes instead of the number of bits: Word length of 16 bits, is equivalent to word length of 2 bytes. Words may be 2 bytes (older architectures), 4 bytes (current architectures), or 8+ bytes (modern architectures).

Memory Organization Accessing the memory to obtain information requires specifying the “address” of the memory location. Recall that a memory has a sequence of bits: Assigning addresses to each bit is impractical and unnecessary. Typically, addresses are assigned to a single byte. “Byte addressable memory” Suppose k bits are used to hold the address of a memory location: Size of the memory in bytes is given by: 2k where k is the number of bits used to hold a memory address. E.g., for a 16-bit address, size of the memory is 216= 65536 bytes What is the size of the memory for a 24-bit address?

Memory Organization (contd…) Byte 0 Byte 2k-1 Memory is viewed as a sequence of bytes. Address of the first byte is 0 Address of the last byte is 2k - 1, where k is the number of bits used to hold memory address E.g. when k = 16, Address of the last byte is 65535 E.g. when k = 2, Address of the first byte is ? Address of the last byte is ?

Memory Organization (contd…) Consider a memory organization: 16-bit memory addresses Size of the memory is ? Word length is 4 bytes Number of words = Memory size(bytes) = ? Word length(bytes) Word #0 starts at Byte #0. Word #1 starts at Byte #4. Last word (Word #?) starts at Byte#?

Memory Organization (contd…) Byte 0 Byte 1 Byte 2 Byte 3 Byte 65535 Byte 65534 Byte 65533 Byte 65532 Word #0 Word #1 Word #16383 Byte 4 MAR MDR Addr 65532 MAR register contains the address of the memory location addressed MDR contains either the data to be written to that address or read from that address.

Instruction types Computer instructions must be capable of performing 4 types of operations. Data transfer/movement between memory and processor registers. E.g., memory read, memory write Arithmetic and logic operations: E.g., addition, subtraction, comparison between two numbers. Program sequencing and flow of control: Branch instructions Input/output transfers to transfer data to and from the real world.

Instruction types Examples of different types of instructions in assembly language notation. Data transfers between processor and memory. Move A, B (B = A). Move A, R1 (R1 = A). Arithmetic and logic operation: Add A, B, C (C = A + B) Sequencing: Jump Label (Jump to the subroutine which starts at Label). Input/output data transfer: Input PORT, R5 (Read from i/o port “PORT” to register R5).

Addressing modes Different ways in which the address of an operand in specified in an instruction is referred to as addressing modes. Register mode Operand is the contents of a processor register. Address of the register is given in the instruction. E.g. NOT R1 Absolute mode Operand is in a memory location. Address of the memory location is given explicitly in the instruction. E.g. NOT A Also called as “Direct mode” in some assembly languages Register and absolute modes can be used to represent variables

Addressing modes (contd..) Immediate mode Operand is given explicitly in the instruction. E.g. Li R0,200 Can be used to represent constants. Register, Absolute and Immediate modes contained either the address of the operand or the operand itself. Some instructions provide information from which the memory address of the operand can be determined That is, they provide the “Effective Address” of the operand. They do not provide the operand or the address of the operand explicitly. Different ways in which “Effective Address” of the operand can be generated.

Addressing modes (contd..) Effective Address of the operand is the contents of a register or a memory location whose address appears in the instruction. R1 Add (R1),R0 Add (A),R0 Register B Operand memory Main A Register R1 contains Address B Address B has the operand Address A contains Address B R1 and A are called “pointers” This is called as “Indirect Mode”

Addressing modes (contd..) Effective Address of the operand is generated by adding a constant value to the contents of the register R1 Add 20(R1),R0 1000 1020 offset = 20 Operand Operand is at address 1020 Register R1 contains 1000 Offset 20 is added to the contents of R1 to generate the address 20 Contents of R1 do not change in the process of generating the address R1 is called as an “index register” What address would be generated by Add 1000(R1), R0 if R1 had 20? This is the “Indexing Mode”

Addressing modes (contd..) Relative mode Effective Address of the operand is generated by adding a constant value to the contents of the Program Counter (PC). Variation of the Indexing Mode, where the index register is the PC instead of a general purpose register. When the instruction is being executed, the PC holds the address of the next instruction in the program. Useful for specifying target addresses in branch instructions. Addressed location is “relative” to the PC, this is called “Relative Mode”

Instruction Set Architecture (ISA) “Instruction Set Architecture is the structure of a computer that a machine language programmer (or a compiler) must understand to write a correct (timing independent) program for that machine.”, or its Critical interface between hardware and software The ISA defines: – Operations that the processor can execute – Data Transfer mechanisms + how to access data – Control Mechanisms (branch, jump, etc) – “Contract” between programmer/compiler + HW 2/23/2019 Dr. Hadi Hassan Computer architecture

Dr. Hadi Hassan Computer architecture Classifying ISAs Stack • Architectures with implicit “stack” – Acts as source(s) and/or destination, TOS is implicit – Push and Pop operations have 1 explicit operand Instructions PUSH B /* store data in address B in stack top */ POP B /* load data in stack top to address B */ ADD /* stack top= stack top + [stacktop-1] */ SUB /* stack top= stack top - [stacktop-1]*/ MUL /* stack top= stack top * [stacktop-1]*/ DIV /* stack top= stack top / [stacktop-1]*/ 2/23/2019 Dr. Hadi Hassan Computer architecture

Example Write instructions for the following C statement using Stack–based architecture. F =A * B - ( C * D +E); PUSH C PUSH D MUL PUSH E ADD POP T PUSH B PUSH A POP X PUSH T PUSH X SUB POP F

Dr. Hadi Hassan Computer architecture Accumulator • Architectures with one implicit register – Acts as source and/or destination – One other source explicit Instructions STA B /* store data in accumulator in address B */ LDA B /* put data in address B in accumulator */ ADDA D /* ACC=ACC+D */ SUBA D /* ACC=ACC-D */ MULA F /* ACC=ACC*F */ DIVA F /* ACC=ACC/F */ 2/23/2019 Dr. Hadi Hassan Computer architecture

Example Write the instructions for the following C statement using accumulator –based architecture. F =A * B - ( C * D +E); Solution: LDA C /* put data in address C in accumulator */ MULA D /* Acc=C*D */ ADDA E /* Acc=C*D+E */ STA T /* T=C*D+E */ LDA A /* put data in address A in accumulator */ MULA B /* Acc=A*B */ SUBA T /* Acc=A*B-(C*D+E) */ STA F /* F= A*B-(C*D+E) */

Dr. Hadi Hassan Computer architecture Register • Most common approach – Fast, temporary storage (small) – Explicit operands (register IDs) • Example: C = A + B Register-memory load/store Load R1, A Load R1, A Add R3 ,R1,B Load R2, B Store R3,C Add R3,R1,R2 Store R3,C • All RISC ISAs are load/store • IBM 360, Intel x86, Moto 68K are register-memory 2/23/2019 Dr. Hadi Hassan Computer architecture

Dr. Hadi Hassan Computer architecture RISC vs. CISC Arguments • RISC ( Reduced Instruction Set Computer ) – Simple Implementation • Load/store, fixed-format 32-bit instructions, efficient pipelines – Lower CPI (Cycle Per Instruction ) – Compilers do a lot of the hard work • MIPS = Microprocessor without Interlocked Pipelined Stages • CISC ( Complex Instruction Set Computer ) – Simple Compilers (assists hand-coding, many addressing modes, many instructions) – Code Density 2/23/2019 Dr. Hadi Hassan Computer architecture

Overview of the MIPS ISA All instructions are 32-bit wide Instruction Categories Load/Store Integer Arithmetic Jump and Branch Floating Point Memory Management Three Instruction Formats R0 - R31 PC HI LO Registers Op6 Rs5 Rt5 Rd5 funct6 sa5 immediate16 immediate26 R-type I-type J-type 2/23/2019 Dr. Hadi Hassan Computer architecture

Components of MIPS Architecture Memory Other components of the datapath Control unit 2/23/2019 Dr. Hadi Hassan Computer architecture

Dr. Hadi Hassan Computer architecture Memory: text segment vs. data segment Text segment “instruction memory” part of memory that stores the program (machine code) read only Data segment “data memory” part of memory that stores data manipulated by program read/write Dr. Hadi Hassan Computer architecture 2/23/2019

Dr. Hadi Hassan Computer architecture Program counter (PC) Program: a sequence of machine instructions in the text segment Program Counter : register that stores the address of the next instruction to fetch also called the instruction pointer (IP ) 2/23/2019 Dr. Hadi Hassan Computer architecture

Dr. Hadi Hassan Computer architecture Control Units Control components of datapath to implement the Fetch Decode Execution cycle Input : Condition Signals Output: Control Signals 2/23/2019 Dr. Hadi Hassan Computer architecture

Instruction Set Architecture (Interface SW/HW) Abstraction Layers Software Application Operating System Compiler Assembler Linker Loader Processor Memory I/O System Datapath & Control Design Digital Logic Design Circuit Design Physical (IC Layout) Design Scheduler Device Drivers Instruction Set Architecture (Interface SW/HW) Hardware Abstraction hides implementation details between levels Helps us cope with enormous complexity ISA is at the interface between software and hardware 2/23/2019 Dr. Hadi Hassan Computer architecture

Abstraction Delving into the depths reveals more information An abstraction omits unneeded detail, helps us cope with complexity

Summary Computer Architecture = Instruction Set Architecture + Machine Organization All computers consist of five components Processor: (1) datapath and (2) control (3) Memory (4) Input devices and (5) Output devices Not all “memory” are created equally Cache: fast (expensive) memory are placed closer to the processor Main memory: less expensive memory--we can have more Interfaces are where the problems are - between functional units and between the computer and the outside world