Montek Singh Mon, Mar 28, 2011 Lecture 11 Computer Organization and Design Arithmetic Circuits: Multiplication and Division Montek Singh Mon, Mar 28, 2011 Lecture 11

Binary Multipliers Reading: Study Chapter 3.1-3.4 The key trick of multiplication is memorizing a digit-to-digit table… Everything else was just adding × 1 × 1 2 3 4 5 6 7 8 9 10 12 14 16 18 15 21 24 27 20 28 32 36 25 30 35 40 45 42 48 54 49 56 63 64 72 81 You’ve got to be kidding… It can’t be that easy! Reading: Study Chapter 3.1-3.4 (including Booth coding [self study])

Binary Multiplication 1 X The “Binary” Multiplication Table Binary multiplication is implemented using the same basic longhand algorithm that you learned in grade school. Hey, that looks like an AND gate A3 A2 A1 A0 x B3 B2 B1 B0 A3B0 A2B0 A1B0 A0B0 AjBi is a “partial product” A3B1 A2B1 A1B1 A0B1 A3B2 A2B2 A1B2 A0B2 + A3B3 A2B3 A1B3 A0B3 Multiplying N-digit number by M-digit number gives (N+M)-digit result Easy part: forming partial products (just an AND gate since BI is either 0 or 1) Hard part: adding M, N-bit partial products

Multiplication: Implementation S t a r t D o n e 1 . T s t M u l i p r a A d m c h P g 2 S f b 3 M u l t i p l i e r = 1 M u l t i p l i e r = t N o : < 3 2 r e p e t i t i o n s 3 2 n d r e p e t i t i o n ? Y e s : 3 2 r e p e t i t i o n s

Second Version S t a r t M u l t i p l i c a n d D o n e 1 . T s t M u a A d m c h f P g 2 S b 3 3 2 b i t s M u l t i p l i e r = 1 M u l t i p l i e r = M u l t i p l i e r 3 2 - b i t A L U S h i f t r i g h t 3 2 b i t s S h i f t r i g h t P r o d u c t C o n t r o l t e s t W r i t e 6 4 b i t s i f t t h e M u l t i p l i e r r e g i s t e r r i g h t 1 b i t N o : < 3 2 r e p e t i t i o n s 3 2 n d r e p e t i t i o n ? Y e s : 3 2 r e p e t i t i o n s

Example for second version 0010 1100 0001 0110 0010 0001 0000 Test true shift right 4 0001 1000 0000 1100 0010 0001 Test false shift right 3 0011 0000 0001 1000 0101 0010 2 0010 0000 0001 0000 1011 0101 1 0000 0000 1011 Initial Product Multiplicand Multiplier Step Iteration

Final Version S t a r t D o n e 1 . T s t P r d u c a A m l i p h f g 2 S b 3 M u l t i p l i c a n d 3 2 b i t s P r o d u c t = 1 P r o d u c t = 3 2 - b i t A L U S h i f t r i g h t C o n t r o l P r o d u c t W r i t e t e s t 6 4 b i t s The trick is to use the lower half of the product to hold the multiplier during the operation. N o : < 3 2 r e p e t i t i o n s e p e t i t i o n ? Y e s : 3 2 r e p e t i t i o n s

What about the sign? Positive numbers are easy How about negative numbers? Please read Booth coding in textbook

Faster Multiply A1 & B A0 & B A2 & B A3 & B A31 & B P32-P63 P2 P1 P0

Simple Combinational Multiplier tPD = 10 * tPD,FA not 16 HA A Co B S tPD = (2*(N-1) + N) * tPD,FA Components: N * HA N(N-1) * FA The Logic of a Half- Adder CO A B S NB: this circuit only works for nonnegative operands

Carry-Save Combinational Multiplier These Adders can be removed, and the AND gate outputs tied directly to the Carry inputs of the next stage. Observation: Rather than propagating the sums across each row, the carries can instead be forwarded onto the next column of the following row tPD = 8 * tPD,FA This small improvement in performance hardly seems worth the effort, however, this design is easier to pipeline. tPD = (N+N) * tPD,FA Components: N * HA N2 * FA

Division Start 1. Subtract Divisor from the Remainder leave the result in the Remainder >=0 <0 Test Remainder Restore Remainder by adding Divisor Shift Quotient to the left set its rightmost bit = 0 Shift Quotient to the left set its rightmost bit = 1 Shift Divisor Register right 1 bit Repeat 33 times