§4.4 Input and Output Devices Douglas Wilhelm Harder, M.Math. LEL Department of Electrical and Computer Engineering University of Waterloo Waterloo, Ontario, Canada ece.uwaterloo.ca dwharder@alumni.uwaterloo.ca © 2012 by Douglas Wilhelm Harder. Some rights reserved. Based in part on Gary Nutt, Operating Systems, 3rd ed.

Outline This topic looks at input and output devices I/O Devices Categories Device controllers Direct Memory Access Memory-mapped I/O

I/O Devices I/O devices communicate with a CPU through the system bus Input devices signal the CPU that it is ready to transmit data The CPU retrieves and deals with that data Often the data is from registers into main memory Similarly, the CPU can signal that it has data ready to transmit to output devices Devices retrieve the data Again, often the data that is being transmitted had to be copied from main memory into registers before it was sent on

I/O Devices Communication serial and parallel ports network cards (including wireless) infrared transmitter/receivers Input keyboard mouse touch-sensitive screen microphone Output terminal graphical speaker printer User: Bilby Storage hard drives USB drives CD ROM

I/O Devices Internal devices are connected directly to Communications connections usually pass through some port: Ethernet USB Firewire (IEEE 1394) and thunderbolt VGA and DVI SCSI Parallel, PS/2, Serial and TRS

I/O Devices I/O Devices More and more common these days is to see devices with a network connection (wireless or landline) Significantly greater costs Significantly greater flexibility It’s useful that we’re moving from IPv4 to IPv6 soon 232 IP addresses aren’t enough IPv6 allows for 2128 IP addresses Again, the cost of quadrupling the IP address size is insignificant to the increase in hardware

I/O Devices I/O Devices Each device has a controller that connects it to the CPU via the system bus Each controller provides the standard interface Most data buses today are either 32-bit or 64-bit This means four or eight bytes can be loaded or read at once The size of the data bus describes the length of a word

I/O Devices Device Controllers Applications communicate through a common interface presented by the device driver The driver communicates with a device controller The controller is doubly hardware dependent

I/O Devices Device Controllers Most device controllers will have hardware implementations for basic functionality The controller must interface with the interface between devices Examples: PSI Express

Device Controllers Each controller will have registers including: I/O Devices Device Controllers Each controller will have registers including: A command register What the device should do next Data registers Information passed to or copied from the device Status register The current state of the device

I/O Devices Device Controllers Often, two flags within the command register are often busy and done When both are 0 (false), data can be copied to the registers and a command can be sent to the device A new command sets the busy flag to 1: the device now either reads from or writes to the data registers When the command is complete, the done flag is set to 1 and the busy flag is reset to 0 If both are 1, the state is intermediate

I/O Devices Device Controllers If an unrecoverable error occurs during the command, an error code will be copied to a different part of the status register

Device Controllers Another common feature is a buffer I/O Devices Device Controllers Another common feature is a buffer The CPU can continue reading data from an internal buffer while the controller is busy with the next command

I/O Devices Direct Memory Access Another common issue is copying data between a device and main memory By default, all data must be copied through the CPU This can be exceptionally expensive

I/O Devices Direct Memory Access Direct Memory Access (DMA) allows for direct transfer between a device and main memory The device driver provides an address in main memory The DMA controller facilitates the copy data to or from starting at this memory location The CPU can now work in parallel so long as the system bus is not required

I/O Devices Memory-Mapped I/O Instructions for communicating with devices could be through CPU instructions Copy status register to the CPU data register test CPU_register, device_address Send commands to the command register input device_address output device_address Copy values between data registers copy_in CPU_register, device_address, controller_register copy_out CPU_register, device_address, controller_register

I/O Devices Memory-Mapped I/O An alternate model is to explicitly associate specific memory locations with each device Each register is associated with a memory location Writes to those memory locations copies to the data to the corresponding Changes to registers are copied to main memory Benefits: This allows a smaller instruction set Address registers can address device registers

Memory-Mapped I/O Consider the original MS DOS I/O Devices Memory-Mapped I/O Consider the original MS DOS It dedicated the top 384 KiB of memory available to an 8088 to system memory including memory-mapped I/O In this case, the mapping is permanent

Summary This topic looks at input and output devices I/O Devices Input, output, storage, communication Device controllers Direct Memory Access Memory-mapped I/O