doc.: IEEE 802.15-<doc#> <month year> doc.: IEEE 802.15-<doc#> August 2004 Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs) Submission Title: [High Rate Alt-PHY with shorter backward compatible mapping sequences] Date Submitted: [27 Aug, 2004] Source: [Francois Chin] Company: [Institute for Infocomm Research, Singapore] Address: [21 Heng Mui Keng Terrace, Singapore 119613] Voice: [65-68745684] FAX: [65-67768109] E-Mail: [chinfrancois@i2r.a-star.edu.sg] Re: [Response to the call for proposal of IEEE 802.15.4b, Doc Number: 15-04-0239-00-004b] Abstract: [This presentation represents Institute for Infocomm Research (I2R)’s proposal for the P802.15.4b PHY standard, emphasizing the need for a high rate alternative PHY for low cost system having excellent sensitivity and long battery life.] Purpose: [Proposal to IEEE 802.15.4b Task Group] Notice: This document has been prepared to assist the IEEE P802.15. It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor acknowledges and accepts that this contribution becomes the property of IEEE and may be made publicly available by P802.15. Francois Chin, Institute for Infocomm Research (I2R) <author>, <company>

August 2004 Proposal A set of shorter sequences for backward compatible Symbol-to-Chip mapping, with balanced BER performance using both direct sequence despreading and differential chip despreading, that can achieve various higher data rate BPSK and Raised cosine pulse shape is used, with 802.15.4 2.4GHz PHY modulation scheme as option Francois Chin, Institute for Infocomm Research (I2R)

Summary of Code Sets August 2004 Code Set A32 B16 C8 D8 E16 Description 32-chip (15.4 original) 16-chip (I2R proposed) 8-chip for DS Despreading 8-chip for Diff. Chip Despreading (I2R proposed) Orthogonal 16-DSSS Sym-Chip mapping Cyclic & Odd Bit Inversion Orthogonal Bit/sym 4 3 Bit/chip 0.125 0.25 0.5 0.375 Root Sequence (hex) D9C3522E 3AFC B2 45 N.A. DS Despreading (DSD) Yes Diffential Chip Despreading (DCD) No Francois Chin, Institute for Infocomm Research (I2R)

Features of Proposed Code Set August 2004 Features of Proposed Code Set Backward compatible: Same sub-GHz modulation scheme – BPSK + Raised cosine pulse shape Same 2.4GHz modulation scheme – OQPSK + Half-sine pulse shape Same Symbol-to-Chip mapping, except with shorter code lengths (16/8 chip per symbol) than original length-32 code 16-chip sequences for 4-bit mapping, the mapping sequences are related to each other through cyclic shifts and/or conjugation (i.e., inversion of odd-indexed chip values) 8-chip sequences for 3 or 4-bit mapping, the mapping sequences are related to each other through cyclic shifts and/or conjugation (i.e., inversion of odd-indexed chip values) Proposed code sets have balanced BER performance using both direct sequence despreading and differential chip despreading Francois Chin, Institute for Infocomm Research (I2R)

Adjacent Channel Spectra August 2004 Adjacent Channel Spectra Francois Chin, Institute for Infocomm Research (I2R)

Proposed Symbol-to-Chip Mapping (16-chip Code Set B16) August 2004 Proposed Symbol-to-Chip Mapping (16-chip Code Set B16) Decimal Value Binary Symbol Chip Value 0000 0 0 1 1 1 0 1 0 1 1 1 1 1 1 0 0 (Root - 3AFC) 1 1000 0 0 0 0 1 1 1 0 1 0 1 1 1 1 1 1 2 0100 1 1 0 0 0 0 1 1 1 0 1 0 1 1 1 1 3 1100 1 1 1 1 0 0 0 0 1 1 1 0 1 0 1 1 4 0010 1 1 1 1 1 1 0 0 0 0 1 1 1 0 1 0 5 1010 1 0 1 1 1 1 1 1 0 0 0 0 1 1 1 0 6 0110 1 0 1 0 1 1 1 1 1 1 0 0 0 0 1 1 7 1110 1 1 1 0 1 0 1 1 1 1 1 1 0 0 0 0 8 0001 0 1 1 0 1 1 1 1 1 0 1 0 1 0 0 1 9 1001 0 1 0 1 1 0 1 1 1 1 1 0 1 0 1 0 10 0101 1 0 0 1 0 1 1 0 1 1 1 1 1 0 1 0 11 1101 1 0 1 0 0 1 0 1 1 0 1 1 1 1 1 0 12 0011 1 0 1 0 1 0 0 1 0 1 1 0 1 1 1 1 13 1011 1 1 1 0 1 0 1 0 0 1 0 1 1 0 1 1 14 0111 1 1 1 1 1 0 1 0 1 0 0 1 0 1 1 0 15 1111 1 0 1 1 1 1 1 0 1 0 1 0 0 1 0 1 The sequences are related to each other through cyclic shifts and/or conjugation (i.e., inversion of odd-indexed chip values) Francois Chin, Institute for Infocomm Research (I2R)

Other Root Sequences (16-chip Code Set B16) August 2004 Other Root Sequences (16-chip Code Set B16) The following Root Sequences are found through exhaustive search with identical low cross correlation and autocorrelation, in base 10: 141 177 282 311 354 473 537 564 609 708 965 1074 1127 1128 1205 1218 1244 1310 1385 1416 1475 1565 1841 1892 2067 2148 2256 2405 2436 2747 2832 3095 3201 3541 3775 3860 4107 4134 4211 4296 4508 4512 4820 4872 4901 4976 5077 5135 5240 5273 5330 5411 5494 5497 5540 5581 5587 5664 5749 5900 6260 6293 6402 6517 6593 6657 7082 7364 7430 7568 7685 8110 8214 8259 8268 8525 8592 8879 8981 9024 9211 9491 9542 9620 9744 9797 9982 10154 10988 10994 11162 11174 11245 11328 11498 11585 11755 11939 12190 12279 12380 12417 12551 12626 12637 12804 12881 13034 13246 13314 13399 13445 14011 14081 14164 14319 14987 15031 15100 15331 15357 15440 15610 15697 15867 16015 16102 16306 16419 16428 16502 16518 16536 16625 16685 16730 16775 16844 16985 17184 17269 17609 17653 17702 17758 17779 17821 17957 18013 18032 18048 18305 18515 18629 18833 19195 19280 19488 19543 19604 19745 19904 20223 20308 20540 20555 20630 20701 20786 20797 20839 20873 20887 20960 21041 21092 21320 21559 21583 21602 21644 21976 21988 22160 22324 22348 22369 22417 22656 22850 22996 23105 23530 23600 23761 23857 23878 23941 24133 24558 24834 24919 25040 25089 25172 25274 25582 25607 25608 25682 25865 26068 26347 26372 26449 26559 26628 26798 26885 27055 27367 27571 27610 28328 28342 28585 28638 28642 28691 28742 28865 29439 29456 29509 29611 29720 29893 29974 29977 30019 30229 30272 30382 30714 30740 30910 30997 31167 31394 31435 31734 32440 32463 …. Francois Chin, Institute for Infocomm Research (I2R)

August 2004 Proposed Symbol-to-Chip Mapping (8-chip Code Set C8 for DS Despreading) DDecimal Symbol Binary Symbol Chip Values 0 0 0 0 1 0 1 1 0 0 1 0 (Root Sequence – B2) 1 1 0 0 0 0 1 0 1 1 0 0 1 2 0 1 0 0 1 0 1 0 1 1 0 0 3 1 1 0 0 0 1 0 1 0 1 1 0 4 0 0 1 0 0 0 1 0 1 0 1 1 5 1 0 1 0 1 0 0 1 0 1 0 1 6 1 1 1 0 1 1 0 0 1 0 1 0 7 0 1 1 1 0 1 1 0 0 1 0 1 8 0 0 0 1 1 1 1 0 0 1 1 1 9 1 0 0 1 0 0 0 0 1 1 0 0 10 0 1 0 1 1 1 1 1 1 0 0 1 11 1 1 0 1 0 0 0 0 0 0 1 1 12 0 0 1 1 0 1 1 1 1 1 1 0 13 1 0 1 1 1 1 0 0 0 0 0 0 14 1 0 0 1 1 1 1 1 15 1 1 1 1 0 0 1 1 0 0 0 0 The sequences are related to each other through cyclic shifts and/or conjugation (i.e., inversion of odd-indexed chip values) Francois Chin, Institute for Infocomm Research (I2R)

Other Root Sequences (8-chip C8 for DS Despreading only) August 2004 Other Root Sequences (8-chip C8 for DS Despreading only) The following Root Sequences are found through exhaustive search with identical low cross correlation and autocorrelation, in base 10: 3 6 9 12 18 23 24 29 33 36 43 46 48 53 58 63 66 71 72 77 83 86 89 92 96 101 106 111 113 116 123 126 129 132 139 142 144 149 154 159 163 166 169 172 178 183 184 189 192 197 202 207 209 212 219 222 226 231 232 237 243 246 249 252 Francois Chin, Institute for Infocomm Research (I2R)

Proposed Symbol-to-Chip Mapping (8-chip Code Set D8) August 2004 Proposed Symbol-to-Chip Mapping (8-chip Code Set D8) 3-bit / symbol mapping Decimal Value Binary Symbol Chip Value 000 0 1 0 0 0 1 0 1 (root – 45h) 1 100 0 1 0 1 0 0 0 1 2 010 0 1 0 1 0 1 0 0 3 110 0 0 0 1 0 1 0 1 4 001 0 0 0 1 0 0 0 0 5 101 0 0 0 0 0 1 0 0 6 011 0 0 0 0 0 0 0 1 7 111 0 1 0 0 0 0 0 0 The sequences are related to each other through cyclic shifts and/or conjugation (i.e., inversion of odd-indexed chip values) Francois Chin, Institute for Infocomm Research (I2R)

Other Root Sequences (8-chip Code Set D8) August 2004 Other Root Sequences (8-chip Code Set D8) The following Root Sequences are found through exhaustive search with identical low cross correlation and autocorrelation, in base 10: 1 4 16 21 64 69 81 84 171 174 186 191 234 239 251 254 Francois Chin, Institute for Infocomm Research (I2R)

BER Performance Comparison (ALL) August 2004 BER Performance Comparison (ALL) Performance of proposed 16-chip and 8-chip code sets, in comparison with original 802.15.4 PHY length-32 Symbol-to-Chip performance and Orthogonal DSSS sequences as in 15-04-0314-00-004b-enhanced-oqpsk-modulation-with-orthogonal-dsss-sequences Francois Chin, Institute for Infocomm Research (I2R)

BER Performance (DS Despreading) August 2004 BER Performance (DS Despreading) Performance comparison DSSS > 32-chip > 16-chip > 8-chip (1/2 bit/chip) > 8-chip (3/8 bit/chip) Francois Chin, Institute for Infocomm Research (I2R)

BER Performance (DC Despreading) August 2004 BER Performance (DC Despreading) Performance comparison 32-chip ~ 8-chip (3/8 bit/chip) > 16-chip Francois Chin, Institute for Infocomm Research (I2R)

Range Performance Comparison (ALL) August 2004 under Constant Transmit Power; comparison based on Ec/No at fixed chip rate Francois Chin, Institute for Infocomm Research (I2R)

BER Performance (DS Despreading) August 2004 BER Performance (DS Despreading) Data rate vs Range trade-off – higher data rate at shorter range Performance comparison - 32-chip > DSSS 16-chip > 16-chip > 8-chip (1/2 bit/chip) Francois Chin, Institute for Infocomm Research (I2R)

BER Performance (DC Despreading) August 2004 BER Performance (DC Despreading) Data rate vs Range trade-off – higher data rate at shorter range Performance comparison - 32-chip > 16-chip > 8-chip (3/8 bit/chip) Francois Chin, Institute for Infocomm Research (I2R)

Summary of Code Sets Performance August 2004 Code Set A32 B16 C8 D8 E16 Description 32-chip (15.4 original) 16-chip (I2R proposed) 8-chip for DS Despreading only 8-chip (I2R proposed) Orthogonal 16-DSSS Normalised RMS X-Corr (DSD) -17.6 dB -14.8 dB - 8.5 dB -6.7 dB Auto-Corr(DSD) -16.0 dB -13.0 dB -11.5 dB -6.0 dB X-Corr (DCD) -24.0 dB N.A. Auto-Corr (DCD) -18.5 dB -17.8 dB X-Corr Spikes Abs Values (DSD) 32 (1x) 8 (8x) 4 (4x) 0 (3x) 16 (1x) 4 (8x) 0 (7x) 8 (1x) 0 (11x) 4 (6x) 0 (1x) 0 (15x) X-Corr Spikes Values (DCD) 0 (6x) -4 (4x) -32 (1x) 0 (14x) -16 (1x) 4 (2x) 0 (10x) -4 (2x) -8 (1x) Francois Chin, Institute for Infocomm Research (I2R)

Performance Comparison - Correlation August 2004 Performance Comparison - Correlation The lower the cross correlation, the lower the symbol error rate The lower the auto correlation, the better the acquisition capability Generally, the longer the sequence length, the better the correlation properties Trade-off better between data rate and desirable correlation properties Francois Chin, Institute for Infocomm Research (I2R)

Summary of Proposal in 868 MHz August 2004 Summary of Proposal in 868 MHz Ch #0 868MHz band Bandwidth 600 kHz Recommended Code Set 8-chip code set D8 (3/8 bit/chip) 8-chip code set C8 (1/2 bit/chip) Receiver DS / Diff Chip Despreading DS despreading (low ppm reference has to be used) Chip rate 300kcps 400kcps 500kcps Pulse shape Raised cosine with r=1.0 Raised cosine with r=0.5 Raised cosine with r=0.2 Modulation BPSK Data rate 112.5 kbps 150 kbps 187.5 kbps 200 kbps increasing complexity increasing data rate Francois Chin, Institute for Infocomm Research (I2R)

Summary of Proposal in 915 MHz August 2004 Ch #1-10 906 – 924 MHz band Bandwidth 2 MHz Recommended Code Set 16-chip code set B16 (1/4 bit/chip) 8-chip code set D8 (3/8 bit/chip) Receiver DS / Diff Chip Despreading Chip rate 1Mcps Pulse shape Raised cosine with r=1.0 (optional - Half-sine) Modulation BPSK (optional – OQPSK) Data rate 250 kbps 375 kbps Francois Chin, Institute for Infocomm Research (I2R)

August 2004 Summary Proposed shorter mapping sequences has higher spectral efficiency (bps/Hz) Differential chip despreading allows very inexpensive reference to be used For 868MHz band, BPSK scheme is used. Higher data rates, from 112.5kbps – 200kbps, can be achieved using smaller raise cosine roll-off factors For 915MHz band, with effective bandwidth of 1.5MHz, 250kbps / 375kbps can be achieved using length-16 / 8 mapping sequences respectively, together with very inexpensive reference Uses existing modulation scheme BPSK + raise cosine pulse shaping or OQPSK + half sine pulse shaping - to maintain Low RF linearity requirement Compared to orthogonal DSSS sequences, the length-16/8 backward compatible symbol-to-chip mapping sequences requires much lower memory requirement Multiple modes (e.g. using 16/8 length sequences) can be incorporated into devices for flexible data rate / range performance trade-off Francois Chin, Institute for Infocomm Research (I2R)