Instructor: Alexander Stoytchev CprE 281: Digital Logic Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/

Signed Numbers CprE 281: Digital Logic Iowa State University, Ames, IA Copyright © Alexander Stoytchev

Administrative Stuff HW5 is out It is due on Monday Oct 3 @ 4pm. Please write clearly on the first page (in block capital letters) the following three things: Your First and Last Name Your Student ID Number Your Lab Section Letter Also, please staple all of your pages together.

Administrative Stuff Labs Next Week Mini-Project This one is worth 3% of your grade. Make sure to get all the points. http://www.ece.iastate.edu/~alexs/classes/2016_Fall_281/labs/Project-Mini/

Quick Review

(there are four possible cases) Adding two bits (there are four possible cases) [ Figure 3.1a from the textbook ]

Adding two bits (the truth table) [ Figure 3.1b from the textbook ]

Adding two bits (the logic circuit) [ Figure 3.1c from the textbook ]

The Half-Adder [ Figure 3.1c-d from the textbook ]

Addition of multibit numbers Bit position i [ Figure 3.2 from the textbook ]

Analogy with addition in base 10 c3 c2 c1 c0 x2 x1 x0 y2 y1 y0 s2 s1 s0 +

Analogy with addition in base 10 3 8 9 1 5 7 5 4 6 +

Analogy with addition in base 10 0 1 1 0 3 8 9 1 5 7 5 4 6 carry +

Analogy with addition in base 10 c3 c2 c1 c0 x2 x1 x0 y2 y1 y0 s2 s1 s0 +

Problem Statement and Truth Table [ Figure 3.2b from the textbook ] [ Figure 3.3a from the textbook ]

Let’s fill-in the two K-maps [ Figure 3.3a-b from the textbook ]

Let’s fill-in the two K-maps [ Figure 3.3a-b from the textbook ]

The circuit for the two expressions [ Figure 3.3c from the textbook ]

This is called the Full-Adder [ Figure 3.3c from the textbook ]

(si can be implemented in two different ways) XOR Magic (si can be implemented in two different ways)

A decomposed implementation of the full-adder circuit HA c x i HA c c y i + 1 i (a) Block diagram c i s i x i y i c i + 1 (b) Detailed diagram [ Figure 3.4 from the textbook ]

A decomposed implementation of the full-adder circuit HA c x i HA c c y i + 1 i (a) Block diagram c i s i x i y i c HA i + 1 HA (b) Detailed diagram [ Figure 3.4 from the textbook ]

The Full-Adder Abstraction HA c x i c i 1 + HA c y i

The Full-Adder Abstraction FA x i c i 1 + y i

We can place the arrows anywhere xi yi ci+1 FA ci si

n-bit ripple-carry adder x y x y x y n – 1 n – 1 1 1 c 1 c c n FA c n ” 1 2 FA FA c s s s n – 1 1 MSB position LSB position [ Figure 3.5 from the textbook ]

n-bit ripple-carry adder abstraction x y x y x y n – 1 n – 1 1 1 c 1 c c n FA c c n ” 1 2 FA FA s s s n – 1 1 MSB position LSB position

n-bit ripple-carry adder abstraction x y x y x y n – 1 n – 1 1 1 c c n s s s n – 1 1

The x and y lines are typically grouped together for better visualization, but the underlying logic remains the same x n – 1 c n y – s

Math Review: Subtraction 39 15 - ??

Math Review: Subtraction 39 15 - 24

Math Review: Subtraction 82 61 - ?? 48 26 - ?? 32 11 - ??

Math Review: Subtraction 82 61 - 21 48 26 - 22 32 11 - 21

Math Review: Subtraction 82 64 - ?? 48 29 - ?? 32 13 - ??

Math Review: Subtraction 82 64 - 18 48 29 - 19 32 13 - 19

The problems in which row are easier to calculate? 82 61 - ?? 48 26 - ?? 32 11 - ?? 82 64 - ?? 48 29 - ?? 32 13 - ??

The problems in which row are easier to calculate? 82 61 - 21 48 26 - 22 32 11 - 21 Why? 82 64 - 18 48 29 - 19 32 13 - 19

Another Way to Do Subtraction 82 – 64 = 82 + 100 – 100 - 64

Another Way to Do Subtraction 82 – 64 = 82 + 100 – 100 - 64 = 82 + (100 – 64) - 100

Another Way to Do Subtraction 82 – 64 = 82 + 100 – 100 - 64 = 82 + (100 – 64) - 100 = 82 + (99 + 1 – 64) - 100

Another Way to Do Subtraction 82 – 64 = 82 + 100 – 100 - 64 = 82 + (100 – 64) - 100 = 82 + (99 + 1 – 64) - 100 = 82 + (99 – 64) +1 - 100

Another Way to Do Subtraction 82 – 64 = 82 + 100 – 100 - 64 = 82 + (100 – 64) - 100 = 82 + (99 + 1 – 64) - 100 Does not require borrows = 82 + (99 – 64) +1 - 100

9’s Complement (subtract each digit from 9) 99 64 - 35

10’s Complement (subtract each digit from 9 and add 1 to the result) 99 64 - 35 + 1 = 36

Another Way to Do Subtraction 82 – 64 = 82 + (99 – 64) +1 - 100

Another Way to Do Subtraction 9’s complement 82 – 64 = 82 + (99 – 64) +1 - 100

Another Way to Do Subtraction 9’s complement 82 – 64 = 82 + (99 – 64) +1 - 100 = 82 + 35 + 1 - 100

Another Way to Do Subtraction 9’s complement 82 – 64 = 82 + (99 – 64) +1 - 100 10’s complement = 82 + 35 + 1 - 100

Another Way to Do Subtraction 9’s complement 82 – 64 = 82 + (99 – 64) +1 - 100 10’s complement = 82 + 35 + 1 - 100 = 82 + 36 - 100

Another Way to Do Subtraction 9’s complement 82 – 64 = 82 + (99 – 64) +1 - 100 10’s complement = 82 + 35 + 1 - 100 = 82 + 36 - 100 // Add the first two. = 118 - 100

Another Way to Do Subtraction 9’s complement 82 – 64 = 82 + (99 – 64) +1 - 100 10’s complement = 82 + 35 + 1 - 100 = 82 + 36 - 100 // Add the first two. = 118 - 100 // Just delete the leading 1. // No need to subtract 100. = 18

Formats for representation of integers b b b n – 1 1 Magnitude MSB (a) Unsigned number b b b b n – 1 n – 2 1 Magnitude Sign 0 denotes + 1 denotes – MSB (b) Signed number [ Figure 3.7 from the textbook ]

Negative numbers can be represented in following ways Sign and magnitude 1’s complement 2’s complement

1’s complement Let K be the negative equivalent of an n-bit positive number P. Then, in 1’s complement representation K is obtained by subtracting P from 2n – 1, namely K = (2n – 1) – P This means that K can be obtained by inverting all bits of P.

Find the 1’s complement of … 0 0 1 0 0 1 0 1 0 0 1 1 0 1 1 1

Find the 1’s complement of … 0 0 1 0 0 1 0 1 1 0 1 0 1 1 0 1 0 0 1 1 0 1 1 1 1 1 0 0 1 0 0 0 Just flip 1's to 0's and vice versa.

A) Example of 1’s complement addition ( + 5 ) 0 1 0 1 + ( + 2 ) + 0 0 1 0 ( + 7 ) 0 1 1 1 [ Figure 3.8 from the textbook ]

A) Example of 1’s complement addition ( + 5 ) 0 1 0 1 + ( + 2 ) + 0 0 1 0 ( + 7 ) 0 1 1 1

B) Example of 1’s complement addition ( - 5 ) 1 0 1 0 + ( + 2 ) + 0 0 1 0 ( - 3 ) 1 1 0 0 [ Figure 3.8 from the textbook ]

B) Example of 1’s complement addition ( - 5 ) 1 0 1 0 + ( + 2 ) + 0 0 1 0 ( - 3 ) 1 1 0 0

C) Example of 1’s complement addition ( + 5 ) 0 1 0 1 + ( – 2 ) + 1 1 0 1 ( + 3 ) 1 0 0 1 0 [ Figure 3.8 from the textbook ]

C) Example of 1’s complement addition ( + 5 ) 0 1 0 1 + ( – 2 ) + 1 1 0 1 ( + 3 ) 1 0 0 1 0

C) Example of 1’s complement addition ( + 5 ) 0 1 0 1 + ( – 2 ) + 1 1 0 1 But this is 2! ( + 3 ) 1 0 0 1 0

C) Example of 1’s complement addition ( + 5 ) 0 1 0 1 + ( – 2 ) + 1 1 0 1 ( + 3 ) 1 0 0 1 0 1 0 0 1 1 We need to perform one more addition to get the result.

C) Example of 1’s complement addition ( + 5 ) 0 1 0 1 + ( – 2 ) + 1 1 0 1 ( + 3 ) 1 0 0 1 0 1 0 0 1 1 We need to perform one more addition to get the result.

D) Example of 1’s complement addition ( – 5 ) 1 0 1 0 + ( – 2 ) + 1 1 0 1 ( – 7 ) 1 0 1 1 1 [ Figure 3.8 from the textbook ]

D) Example of 1’s complement addition ( – 5 ) 1 0 1 0 + ( – 2 ) + 1 1 0 1 ( – 7 ) 1 0 1 1 1

D) Example of 1’s complement addition ( – 5 ) 1 0 1 0 + ( – 2 ) + 1 1 0 1 But this is +7! ( – 7 ) 1 0 1 1 1

D) Example of 1’s complement addition ( – 5 ) 1 0 1 0 + ( – 2 ) + 1 1 0 1 ( – 7 ) 1 0 1 1 1 1 1 0 0 0 We need to perform one more addition to get the result.

D) Example of 1’s complement addition ( – 5 ) 1 0 1 0 + ( – 2 ) + 1 1 0 1 ( – 7 ) 1 0 1 1 1 1 1 0 0 0 We need to perform one more addition to get the result.

2’s complement Let K be the negative equivalent of an n-bit positive number P. Then, in 2’s complement representation K is obtained by subtracting P from 2n , namely K = 2n – P

Deriving 2’s complement For a positive n-bit number P, let K1 and K2 denote its 1’s and 2’s complements, respectively. K1 = (2n – 1) – P K2 = 2n – P Since K2 = K1 + 1, it is evident that in a logic circuit the 2’s complement can computed by inverting all bits of P and then adding 1 to the resulting 1’s-complement number.

Find the 2’s complement of … 0 1 0 1 0 0 1 0 0 1 0 0 0 1 1 1

Find the 2’s complement of … 0 1 0 1 0 0 1 0 1 0 1 0 1 1 0 1 0 1 0 0 0 1 1 1 1 0 1 1 1 0 0 0 Invert all bits.

Find the 2’s complement of … 0 1 0 1 0 0 1 0 1 0 1 0 1 1 0 1 1 + 1 1 0 1 1 1 1 1 0 + 0 1 0 0 0 1 1 1 1 0 1 1 1 1 1 0 0 + 1 0 0 0 1 1 0 0 1 + Then add 1.

Quick Way to find 2’s complement Scan the binary number from right to left Copy all bits that are 0 from right to left Stop at the first 1 Copy that 1 as well Invert all remaining bits

Find the 2’s complement of … 0 1 0 1 0 0 1 0 0 1 0 0 0 1 1 1

Find the 2’s complement of … 0 1 0 1 0 0 1 0 . . . . . . . 0 0 1 0 0 0 1 1 1 . . 0 0 . . . . Copy all bits that are 0 from right to left.

Find the 2’s complement of … 0 1 0 1 0 0 1 0 . . . 1 . . 1 0 0 1 0 0 0 1 1 1 . 1 0 0 . . . 1 Stop at the first 1. Copy that 1 as well.

Find the 2’s complement of … 0 1 0 1 0 0 1 0 1 0 1 1 1 1 1 0 0 1 0 0 0 1 1 1 1 1 0 0 1 0 0 1 Invert all remaining bits.

Interpretation of four-bit signed integers [ Table 3.2 from the textbook ]

Interpretation of four-bit signed integers Notice that in this representation there are two zeros!

Interpretation of four-bit signed integers There are two zeros in this representation as well!

Interpretation of four-bit signed integers In this representation there is one more negative number.

The number circle for 2's complement [ Figure 3.11a from the textbook ]

A) Example of 2’s complement addition ( + 5 ) 0 1 0 1 + ( + 2 ) + 0 0 1 0 ( + 7 ) 0 1 1 1 [ Figure 3.9 from the textbook ]

B) Example of 2’s complement addition ( – 5 ) 1 0 1 1 + ( + 2 ) + 0 0 1 0 ( – 3 ) 1 1 0 1 [ Figure 3.9 from the textbook ]

C) Example of 2’s complement addition ( + 5 ) 0 1 0 1 + ( – 2 ) + 1 1 1 0 ( + 3 ) 1 0 0 1 1 ignore [ Figure 3.9 from the textbook ]

D) Example of 2’s complement addition ( – 5 ) 1 0 1 1 + ( – 2 ) + 1 1 1 0 ( – 7 ) 1 1 0 0 1 ignore [ Figure 3.9 from the textbook ]

Example of 2’s complement subtraction ( + 5 ) 0 1 0 1 0 1 0 1 – ( + 2 ) – 0 0 1 0 + 1 1 1 0 ( + 3 ) 1 0 0 1 1 ignore means take the 2's complement [ Figure 3.10 from the textbook ]

Example of 2’s complement subtraction ( – 5 ) 1 0 1 1 1 0 1 1 – ( + 2 ) – 0 0 1 0 + 1 1 1 0 ( – 7 ) 1 1 0 0 1 ignore [ Figure 3.10 from the textbook ]

Example of 2’s complement subtraction ( + 5 ) 0 1 0 1 0 1 0 1 – ( – 2 ) – 1 1 1 0 + 0 0 1 0 ( + 7 ) 0 1 1 1 [ Figure 3.10 from the textbook ]

Example of 2’s complement subtraction ( – 5 ) 1 0 1 1 1 0 1 1 – ( – 2 ) – 1 1 1 0 + 0 0 1 0 ( – 3 ) 1 1 0 1 [ Figure 3.10 from the textbook ]

Graphical interpretation of four-bit 2’s complement numbers [ Figure 3.11 from the textbook ]

Take-Home Message Subtraction can be performed by simply adding the 2’s complement of the second number, regardless of the signs of the two numbers. Thus, the same adder circuit can be used to perform both addition and subtraction !!!

Adder/subtractor unit y y y n – 1 1 Add ¤ Sub control x x x n – 1 1 c n -bit adder c n s s s n – 1 1 [ Figure 3.12 from the textbook ]

XOR Tricks y control out

XOR as a repeater y

XOR as an inverter y 1

Addition: when control = 0 y y y n – 1 1 Add ¤ Sub control x x x n – 1 1 c n -bit adder c n s s s n – 1 1 [ Figure 3.12 from the textbook ]

Addition: when control = 0 y y y n – 1 1 Add ¤ Sub control x x x n – 1 1 c n -bit adder c n s s s n – 1 1 [ Figure 3.12 from the textbook ]

Addition: when control = 0 y y y n – 1 1 Add ¤ Sub control x x x n – 1 1 yn-1 … y1 y0 c n -bit adder c n s s s n – 1 1 [ Figure 3.12 from the textbook ]

Subtraction: when control = 1 y y y n – 1 1 Add ¤ Sub control x x x n – 1 1 c n -bit adder c n s s s n – 1 1 [ Figure 3.12 from the textbook ]

Subtraction: when control = 1 y y y n – 1 1 1 Add ¤ Sub control 1 1 1 x x x n – 1 1 c n -bit adder c n s s s n – 1 1 [ Figure 3.12 from the textbook ]

Subtraction: when control = 1 y y y n – 1 1 1 Add ¤ Sub control 1 1 1 x x x n – 1 1 yn-1 … y1 y0 c n -bit adder c n s s s n – 1 1 [ Figure 3.12 from the textbook ]

Subtraction: when control = 1 y y y n – 1 1 1 Add ¤ Sub control 1 1 1 x x x n – 1 1 yn-1 … y1 y0 c n -bit adder c n 1 carry for the first column! s s s n – 1 1 [ Figure 3.12 from the textbook ]

Examples of determination of overflow ( + 7 ) 0 1 1 1 ( – 7 ) 1 0 0 1 + + + ( + 2 ) 0 0 1 0 + ( + 2 ) 0 0 1 0 ( + 9 ) 1 0 0 1 ( – 5 ) 1 0 1 1 ( + 7 ) 0 1 1 1 ( – 7 ) 1 0 0 1 + + + ( – 2 ) 1 1 1 0 + ( – 2 ) 1 1 1 0 ( + 5 ) 1 0 1 0 1 ( – 9 ) 1 0 1 1 1 [ Figure 3.13 from the textbook ]

Examples of determination of overflow 0 1 1 0 0 0 0 0 0 0 ( + 7 ) 0 1 1 1 ( – 7 ) 1 0 0 1 + + + ( + 2 ) 0 0 1 0 + ( + 2 ) 0 0 1 0 ( + 9 ) 1 0 0 1 ( – 5 ) 1 0 1 1 1 1 1 0 0 1 0 0 0 0 ( + 7 ) 0 1 1 1 ( – 7 ) 1 0 0 1 + + + ( – 2 ) 1 1 1 0 + ( – 2 ) 1 1 1 0 ( + 5 ) 1 0 1 0 1 ( – 9 ) 1 0 1 1 1 Include the carry bits: c4 c3 c2 c1 c0

Examples of determination of overflow 0 1 1 0 0 0 0 0 0 0 ( + 7 ) 0 1 1 1 ( – 7 ) 1 0 0 1 + + + ( + 2 ) 0 0 1 0 + ( + 2 ) 0 0 1 0 ( + 9 ) 1 0 0 1 ( – 5 ) 1 0 1 1 1 1 1 0 0 1 0 0 0 0 ( + 7 ) 0 1 1 1 ( – 7 ) 1 0 0 1 + + + ( – 2 ) 1 1 1 0 + ( – 2 ) 1 1 1 0 ( + 5 ) 1 0 1 0 1 ( – 9 ) 1 0 1 1 1 Include the carry bits: c4 c3 c2 c1 c0

Examples of determination of overflow c 4 = 3 1 c 4 = 3 0 1 1 0 0 0 0 0 0 0 ( + 7 ) 0 1 1 1 ( – 7 ) 1 0 0 1 + + + ( + 2 ) 0 0 1 0 + ( + 2 ) 0 0 1 0 ( + 9 ) 1 0 0 1 ( – 5 ) 1 0 1 1 c 4 1 = 3 c 4 1 = 3 1 1 1 0 0 1 0 0 0 0 ( + 7 ) 0 1 1 1 ( – 7 ) 1 0 0 1 + + + ( – 2 ) 1 1 1 0 + ( – 2 ) 1 1 1 0 ( + 5 ) 1 0 1 0 1 ( – 9 ) 1 0 1 1 1 Include the carry bits: c4 c3 c2 c1 c0

Examples of determination of overflow c 4 = 3 1 c 4 = 3 0 1 1 0 0 0 0 0 0 0 ( + 7 ) 0 1 1 1 ( – 7 ) 1 0 0 1 + + + ( + 2 ) 0 0 1 0 + ( + 2 ) 0 0 1 0 ( + 9 ) 1 0 0 1 ( – 5 ) 1 0 1 1 c 4 1 = 3 c 4 1 = 3 1 1 1 0 0 1 0 0 0 0 ( + 7 ) 0 1 1 1 ( – 7 ) 1 0 0 1 + + + ( – 2 ) 1 1 1 0 + ( – 2 ) 1 1 1 0 ( + 5 ) 1 0 1 0 1 ( – 9 ) 1 0 1 1 1 Overflow occurs only in these two cases.

Examples of determination of overflow c 4 = 3 1 c 4 = 3 0 1 1 0 0 0 0 0 0 0 ( + 7 ) 0 1 1 1 ( – 7 ) 1 0 0 1 + + + ( + 2 ) 0 0 1 0 + ( + 2 ) 0 0 1 0 ( + 9 ) 1 0 0 1 ( – 5 ) 1 0 1 1 c 4 1 = 3 c 4 1 = 3 1 1 1 0 0 1 0 0 0 0 ( + 7 ) 0 1 1 1 ( – 7 ) 1 0 0 1 + + + ( – 2 ) 1 1 1 0 + ( – 2 ) 1 1 1 0 ( + 5 ) 1 0 1 0 1 ( – 9 ) 1 0 1 1 1 Overflow = c3c4 + c3c4

Examples of determination of overflow c 4 = 3 1 c 4 = 3 0 1 1 0 0 0 0 0 0 0 ( + 7 ) 0 1 1 1 ( – 7 ) 1 0 0 1 + + + ( + 2 ) 0 0 1 0 + ( + 2 ) 0 0 1 0 ( + 9 ) 1 0 0 1 ( – 5 ) 1 0 1 1 c 4 1 = 3 c 4 1 = 3 1 1 1 0 0 1 0 0 0 0 ( + 7 ) 0 1 1 1 ( – 7 ) 1 0 0 1 + + + ( – 2 ) 1 1 1 0 + ( – 2 ) 1 1 1 0 ( + 5 ) 1 0 1 0 1 ( – 9 ) 1 0 1 1 1 Overflow = c3c4 + c3c4 XOR

Calculating overflow for 4-bit numbers with only three significant bits

Calculating overflow for n-bit numbers with only n-1 significant bits

Another way to look at the overflow issue

Another way to look at the overflow issue If both numbers that we are adding have the same sign but the sum does not, then we have an overflow.

Questions?

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