Data representation How do we represent data in a digital system? Digital data is stored as bits: a bit is a binary number {0, 1} in a hardware design this is usually interpreted as 0 Volt, GND {5, 3.3, 1.8, … } Volt, VCC

String of bits! Everything we work with is represented as a string of bits. Example: We don't work with integers! We represent (encode) integers as strings of bits and manipulate those. 1 0 1 0 (binary) represents 1*23 + 0*22 + 1*21 + 0*20 (decimal) 8 + 0 + 2 + 0 = 10 (decimal)

Ask yourself: How many bits are required to represent this thing? How can we do it? We need to structure the information.

Word, halfword and byte “The word: 32 bits”. “The halfword: 16 bits”. “The byte: 8 bits”. 31 High order bit Low order bit 15 7

“The Space” We can group a large number of bit strings into an array called a space. We use at least three spaces: the register space. the instruction space. the data space. Do not confuse them!

The Register Space (or Register “file”) An array of words. Smallest addressable unit is the word. 32 choices, how do we select? 2x = 32, x? x=5 i.e., we need 5 bits! 1 2 3 29 30 31

Address To work with a space we must be able to address the elements of the space. Each space may have a different address method.

The Instruction space (or instruction memory) An array of bytes. Smallest addressable unit is a byte, but the smallest accessible unit is a word. 232 bytes gives 230 accessible words.

What's that mean? An instruction address is 32 bits long. Same as a word. An instruction address fits into a word!

But: Only every fourth address is legal. The ones whose last two bits are “00”. We can access 230 instructions.

Instruction memory 1 Address “4”: 0000........00100 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Address “4”: 0000........00100 Hardware accesses an entire 32-bit word.

Instruction memory 2 Address "3": 0000........00011 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Address "3": 0000........00011 The hardware will complain! This is called an “alignment error”. The address was not “word aligned”.

Byte order Big endian Little endian Byte 0 Byte 1 Byte 2 Byte 3 Addr 0

Instruction memory 3 An instruction is represented by 32 bits. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 An instruction is represented by 32 bits. There are two “instruction formats”. (Not the whole truth, but don't worry about it)

Instruction formats Remember: 6 bits 5 5 5 Format 1 (reg) Opcode rs rt rd 6 bits 5 5 16 Format 2 (imm) Opcode rs rt Immediate Remember: Never immediate field together with rd-field. Immediate field is only 16 bits!

“Data space” 232 bytes, byte addressable, byte accessible. A data address fits into 32 bits. Halfword accesses must be halfword aligned; (low order bit = 0). Word accesses must be word aligned; (low order 2 bits = 0).

Review - How many bits?? Instruction address ? Instruction ? Immediate field ? Register address ? Register ? Data address ? Data ?

Review - How many bits?? Instruction address 32, word aligned Immediate field 16 Register address 5 Register 32 Data address 32, byte aligned Data 8 (byte) 16 (halfword) 32 (word)

Feedback from the lectures: Questions? Feedback from the lectures: Per.Lindgren@ltu.se