State of developments on Readout interface of European DHCAL Clément JAUFFRET - LLR - IN2P3 / CNRS

Laptop pluggable for Debug, dedicated software including test features Introduction Simple test DAQ for prototypes : FPGA for local Readout, simple USB interface, basic test software : Make Debug on Electronics & Detector Need for single slab / standalone DAQ : Laptop pluggable for Debug, dedicated software including test features

Driver Hardware interface Where we are Local State Machine ASICs Interface Acquisition ReadOut Monitoring 1st DAQ USB Blocs RAM Firmware : Software : Config,Readout Protocol CMD|ADDR 2nd ADDR, Data Driver Interface Local State Machine Driver Hardware interface API Data Config

Timing Start on working mi April : 1 Month for first analysis Needed yet : 1 week for code & 2 for vhdl First boards back from manufacturers 1 Month for first analysis Start working on next version in parallel at this point

Next Step Thinking to a 70cm x 70cm prototype Slab based, ~10000 channels Separated board for Readout First step towards DIF for DHCAL Hope to collaborate with UK DAQ groups on interface with LDA to be compatible with Hope to participate in Testbeam at Fermilab If so, need soon dedicated Concentrator card

Cubic meter module Need to demonstrate reliability of physics principle project to build 1m3 prototype (in fact only 70x70x100) ~175000 Channels Will to be EUDET like as much as possible Hope to be integrated in UK DAQ chain At current developments state we project to achieve this current 2009

Conclusion Very tight schedule First having the readout on this board working Sharing experience should be interesting for all parties involved Need to start quickly with mechanical consideration for interfaces to be defined