Design & Co-design of Embedded Systems

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Design & Co-design of Embedded Systems Combinational Logic (2) and Synchronous Sequential Logic in SystemC Maziar Goudarzi

Design & Co-design of Embedded Systems Today Program Rest of Synthesis Issues on Combinational Logic Modeling and Synthesizing Synchronous Sequential Logic in SystemC 2005 Design & Co-design of Embedded Systems

Combinational Logic: If Statement NOTE: The target output must be assigned in all branches of the if statement. Why? 2005 Design & Co-design of Embedded Systems

Design & Co-design of Embedded Systems Switch Statement Same “if statement” rule applies also for “switch statement” 2005 Design & Co-design of Embedded Systems

Design & Co-design of Embedded Systems Loops (Normally) the only supported loop For loop with compile-time determinable iterations 2005 Design & Co-design of Embedded Systems

Other Constructs and Notes Methods Structures Multiple Processes and Delta Delay 2005 Design & Co-design of Embedded Systems

Synchronous Sequential Logic Logic whose outputs depend: not only on the current values of inputs but also on their values in previous times works synchronous to a clock edge Outputs Combinational Logic in1 in2 in3 Memory Element 2005 Design & Co-design of Embedded Systems

Synchronous Sequential Logic (cont’d) Look at the handout Chapter 6 of “A SystemC Primer” book 2005 Design & Co-design of Embedded Systems

Design & Co-design of Embedded Systems Today Summary How to describe combinational logic For simulation For synthesis Synthesis semantics of various C++ constructs How to describe synchronous logic Mainly we discussed synthesis 2005 Design & Co-design of Embedded Systems

Design & Co-design of Embedded Systems Assignments Assignment 3: Is put on the course web-page Exercises of Chapter 4 of “SystemC Primer” book Synthesize your models using the available tool Due date: Tuesday, Aban 24th 2005 Design & Co-design of Embedded Systems

Design & Co-design of Embedded Systems Other Notes Project Progress Report 1 Today is the deadline 2-3 pages, covering List of your collected material Summary of what you’ve done + demo of the C++ app. Your plan for next phases and role of each person 2005 Design & Co-design of Embedded Systems