Day 8: September 23, 2011 Delay and RC Response

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Presentation transcript:

Day 8: September 23, 2011 Delay and RC Response ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 8: September 23, 2011 Delay and RC Response Penn ESE370 Fall2011 -- DeHon

Delay is RC Charging Penn ESE370 Fall2011 -- DeHon

Delay is RC Charging Strategy Understand switch state Break into stages For each stage Understand Rdrive Understand Cload Penn ESE370 Fall2011 -- DeHon

Today RC Charging RC Step Response What is the C? What is the R? Measuring Delay Penn ESE370 Fall2011 -- DeHon

90% Rise Time? Penn ESE370 Fall2011 -- DeHon

What does response look like? about 2ps for 90% rise Penn ESE370 Fall2011 -- DeHon

Governing Equations? (KCL) KCL @ Vmeasure? Current across Resistor? Current into Capacitor? Penn ESE370 Fall2011 -- DeHon

Equations Penn ESE370 Fall2011 -- DeHon

Solve Vmeasure What’s Vmeasure? Penn ESE370 Fall2011 -- DeHon

What does look like? Penn ESE370 Fall2011 -- DeHon

Shape of Curve x e-x 1-e-x Fillin on board 0.1 1 2 2.3 0.1 1 2 2.3 Penn ESE370 Fall2011 -- DeHon

Shape of Curve x e-x 1-e-x 1 0.1 0.9 1/e = 0.37 0.66 2 1/e2 = 0.14 1 0.1 0.9 1/e = 0.37 0.66 2 1/e2 = 0.14 0.86 2.3 Penn ESE370 Fall2011 -- DeHon

Risetime: 10—90% Trise ~= 2.2ps Penn ESE370 Fall2011 -- DeHon

What is C? Penn ESE370 Fall2011 -- DeHon

Capacitance Wire MOSFET gate Logical Gate Fanout -- Total gate load Penn ESE370 Fall2011 -- DeHon

First Order Model Switch As dig in, understand: Loads input capacitively As dig in, understand: Origin of capacitance How can we engineer Tradeoffs Penn ESE370 Fall2011 -- DeHon

Logic Gate Input Capacitance Capacitance on A input? B input? Penn ESE370 Fall2011 -- DeHon

Fanout in Circuit Output routed to many gate inputs Penn ESE370 Fall2011 -- DeHon

Fanout in Circuit Maximum fanout? Second? Min? Penn ESE370 Fall2011 -- DeHon

Lumped Capacitive Load Penn ESE370 Fall2011 -- DeHon

What is R? Penn ESE370 Fall2011 -- DeHon

Resistance Wire resistance Transistor equivalent resistance Supply to transistor source Transistor output gate it is driving Transistor equivalent resistance Penn ESE370 Fall2011 -- DeHon

Wire Resistances Penn ESE370 Fall2011 -- DeHon

First Order Model Switch As dig in, understand: Resistive driver More sophisticated view How can we engineer Tradeoffs Penn ESE370 Fall2011 -- DeHon

Equivalent Resistance What resistances might transistors contribute? How many cases? Assume Ron same all tr, Resistance of each? Penn ESE370 Fall2011 -- DeHon

Equivalent Resistance What resistances might transistors contribute? Input Rout 00 Ron/2 01 Ron 10 11 2Ron Penn ESE370 Fall2011 -- DeHon

Lumped Resistive Source Rtrnet = parallel and series combination of Rtr Penn ESE370 Fall2011 -- DeHon

Measuring Delay Penn ESE370 Fall2011 -- DeHon

Measuring Gate Delay Next stage starts to switch before first finishes Measure 50%--50% 67ps 80ps tdel = 13ps Penn ESE370 Fall2011 -- DeHon

Characterizing Gate/Technology Delay measure will be Function of load on gate Function of input rise time Which, in turn, may be a function of input loading Penn ESE370 Fall2011 -- DeHon

Delay vs. Risetime 1ps rise 100ps rise 20ps delay 10ps delay Penn ESE370 Fall2011 -- DeHon

Characterizing Gate/Technology Delay measure will be Function of load on gate Function of input rise time Which, in turn, may be a function of input loading Want to understand typical At least comparable Penn ESE370 Fall2011 -- DeHon

Measuring/Characterizing Drive with a gate Not an ideal source Measure loaded gate Typical loading – FO4 Penn ESE370 Fall2011 -- DeHon

HW2 Recommendation Penn ESE370 Fall2011 -- DeHon

Rise/Fall Rise and Fall time may differ Why? What is ratio? Input Rout 00 Ron/2 01 Ron 10 11 2Ron Penn ESE370 Fall2011 -- DeHon

Admin HW3 posted Intel talk Wednesday (28th) Penn ESE370 Fall2011 -- DeHon

Delay is RC Charging Penn ESE370 Fall2011 -- DeHon