Research Objective Research Approach Results A Case Study in HW/SW Codesign and RC Project Risk Management: The Honeywell Reconfigurable Space Computer (HRSC) Data requirements stressing satellite downlinks On-board high-performance computing needed RC has potential to help reduce NRE, cycle time, risk, cost However, challenges to overcome Standard architecture and programming model Radiation-hardened components for space Power issues Project cost and risk models Jeremy Ramos Advanced Processing Systems Honeywell, Inc. Clearwater, FL Ian Troxel HCS Research Laboratory University of Florida Gainesville, FL Prototype, proof-of-concept system needed Presented by: Jeremy Ramos #196 MAPLD 2004 Research Approach Results Honeywell Reconfigurable Space Computer (HRSC) developed to build knowledge base Interoperate with current product line At least two Virtex class FPGAs for processing Support several example applications cPCI 6U form factor Radiation tolerance/mitigation for path to flight Consume less than 40 Watts per board HRSC built under budget and on time One year from concept to running applications At most 5 FTE engineering effort at any time Board worked on first boot with 2 jumper wires Many factors contributed to project success HW/SW codesign Simulation/Emulation/Hardware environments Spiral development process Reduction in Non-Recurring Engineering Streamlined design and documentation process