CPU has 6 special locations called registers

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Presentation transcript:

CPU has 6 special locations called registers 4 – bit status register NZVC 16 – bit accumulator (A) 16 – bit index register (X) 16 – bit program counter (PC) 16 – bit stack pointer (SP) 24 – bit instruction register (IR)

Data and Control Input Device Main Memory Output Device Central Processing Unit Main Memory Output Device Bus

0002 0000 0001 0003 0004 0005 Main Memory

Memory address and content 0000 1 0003 0004 0007 000A

Pep Input Pep input comes from either a file or the keyboard, not both at the same time Must specify input source before executing a program For a GUI simulator, input comes from a field

Pep output Pep output goes to either a file or the screen, not both at the same time Must specify output source before executing a program. Need to give file name when output goes to a file For a GUI simulator, output goes to a new window that can be saved into a file

Data and Control Input Device Main Memory Output Device Central Processing Unit Main Memory Output Device Bus

Instruction format Unique, wired into the CPU Instructions are different for different computers The Pep/8 has 39 instructions (Fig 4.6) on your textbook Each instruction contains an instruction specifier (or opcode). Some instruction have operand specifier following instruction specifier. Unary instructions are one byte long and do not have operand specifier

nonuniary instruction Instruction specifier Operand specifier uniary instruction Instruction specifier Instructions

Addressing modes Addressing mode aaa Immediate 000 Direct 001 Indirect 010 Stack relative 011 Stack relative deferred 100 Indexed 101 Stack-indexed 110 Stack-indexed deferred 111 The addressing aaa field

Prep/8 Instruction identifier fields Addressing mode a immediate ìndexed 1 The addressing-a field Register r Accumulator, A Index register, X 1 The register-r field

Examples of nonunary & unary instructions 1 0 0 0 1 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 1 1 1 0 01A3 01A4 01A5 0 0 0 1 1 1 1 0 01A6 Opcode r a a a Operand specifier The above two instructions in binary form are called machine language 1000 1101 0000 0011 0100 1110 0001 1110 The instructions in hexadecimal preceded by their memory addresses 01A3 8D034E 01A6 1E

Direct Addressing Mode aaa = 001 indicates direct addressing Operand specifier is the address of the operand Operand = Mem [Operand Specifier]

Example instructions The stop instruction has instruction specifier 0000 0000 The load instruction has instruction specifier 1100 raaa. It load a word (two bytes) into the (A) or (X) depending on r. The status bits N & Z are affectedز R <- operand; N <- r<0; Z <- r = 0

Example 4.4 Executed the instruction C1004A

Computer Architecture Week Number 12 Chapter 4: Direct Addressing Slides by Eltayeb Abuelyaman The University of Nizwa

Pep/8 Addressing

Pep/8 Instructions

Stop and Load Instructions The stop instruction has instruction specifier 0000 0000 The load instruction has instruction specifier 1100 raaa. It loads a word (two bytes) into the (A) or (X) depending on r. The status bits N & Z are affected r ← Oprnd; N ← r <0; Z ← r=0

Example 4.4 Executed the instruction C1004A Solution C 1 0 0 4 A 1100 0001 0000 0000 0100 1010 Opcode raaa Operand specifier

Load Instruction

The Store instruction

Store register r to memory

The Add instruction

Add Instruction…. continue

The And instruction

The And instruction…continue

The Invert instruction

Load & Store Instructions

Load-Byte Register r from Memory

Character input Instruction

Character Input instruction…continue

Character output cont..

Example Output Instruction