A Trusted Safety Verifier for Process Controller Code

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Presentation transcript:

A Trusted Safety Verifier for Process Controller Code Stephen McLaughlin, Saman Zonouz, Devin Pohly, Patrick McDaniel Presented by Xumiao Zhang and Shenghao Lin 1-9 10-18 19-21 22-26 27-28

Overview Programmable logic controller (PLC) Threat model Trusted Safety Verifier (TSV) PLC code analysis Implementation Evaluation Conclusion

Programmable Logic Controller A Programmable Logic Controller (PLC) is a digital, multi- input multi-output computer used for real-time automation of physical machinery. A PLC’s program is executed continuously as long as the PLC is running.

A PLC’s Life Turn left 2˚ Turn left!

A PLC’s Life Turn left 2˚ Turn left! 1º

A PLC’s Life Not quite... Turn left! 1º

A PLC’s Life Not quite... Turn left! 2º

A PLC’s Life BINGO! Stop! 2º

A PLC’s Life L DW2 ;; Degrees Control Logic < ID255 ST Q 3.2 Control Signal Scan Cycle Sensor Measurements

Bad news... Programmable Controllers are insecure by design Control systems are not robust enough for security patches (i.e. stuxnet)

A PLC’s Life ;; Spin out ;; of control! S Q 3.2 Control Logic

Safety Properties Bounds on numerical device parameters (e.g. maximum drive velocity and acceleration) Safety interlocks, which ensure physically conflicting events do not occur.

Trusted Safety Verifier (TSV) Goal: Only allow code to be run on a PLC if it satisfies a set of engineer-supplied safety properties.

TSV - Challenges Existing tools not up to the task. Control systems are stateful, requiring temporal properties. State space explosion with existing analysis techniques.

TSV - Architecture

Sample PLC Code AI 0.5 ;; And input bit 5 =Q 0.1 ;; Store at output bit 1

Instruction List Intermediate Language Side effects PLC special features Architecture dependent

Instruction List Intermediate Language PLC Code

Symbolic Execution TSV symbolically executes an ILIL program to produce a mapping from path predicates to symbolic outputs. Symbolic execution follows all possible paths through a single scan cycle of the program. Lump together all inputs that produce that same output.

Symbolic Execution - Example if input > 10 then output input + 6 else output 2 * input + 6 Without symbolic execution, an unsigned integer input can generate 2^32 different states. With symbolic execution, only 2 states. We will see its use later.

Symbolic Execution - Expression

Checking Temporal Properties PLCs use stateful variables, which retain their values across the scan cycles. TEG (temporal execution graph) is applied for model checking.

Temporal Execution Graph (TEG) A state machine in which each state transition represents a single scan cycle. Each state in the TEG contains the state and output variables.

TEG

TEG with Symbolic Execution

TSV - A Full Run

Conclusion Developed Trusted Safety Verifier (TSV), a trusted verification platform for programmable logic controllers. last-step security verification of control commands Combination of symbolic execution and model checking Implemented a real-world prototype of the TSV framework on an independent Raspberry PI chip with minimal attack surface. Demonstrated performance in checking various properties in control systems