Sequential Logic

AB Circuit Need to consider hidden input: A B Last Out Out 1 x 1 x Need to consider hidden input: x = don’t care : 0/1

Logic Styles Combinational circuits Output determined solely by inputs Can draw solely with left-to-right signal paths

Logic Styles Sequential circuits Output determined by inputs AND previous outputs Feedback loop

AB Circuit If A = 1 output must be 1 A B O 1

AB Circuit If A = 0 and B = 1 output must be 0 A B O 1

AB Circuit If A = 0 and B = 0 output may be 1 or 0 A B O 0/1?? 1

AB Circuit Describe next output Ot+1 in terms of current output Ot A B Ot 1

SR Circuit Set Reset circuit Q : Output state Q' : Opposite of output Qt+1 Qt 1 illegal

Clocks and Triggers

State Elements State elements Memory to preserve state until next clock tick

Clocks Crystal Oscillators Vibrate at known frequency when current applied Used to generate clock signal:

Clocks Timing can be Level-triggered : change can happen when clock high Edge-triggered : change can happen on edge

Logisim Clock Clock alternates between high and low Push to cycle Or turn it on

Level Triggered Level triggered elements change on high clock

D Latch D Latch : Stores single bit of Data Level triggered D : 1 sets S 1 D : 0 sets R 1 D Qt+1 1

Edge Triggered Edge triggered change on rising or falling edge

D Flip Flop D Flip Flop : Stores single bit of Data Edge triggered D Qt+1 1

Memory Systems

Memory's Atom Basic building block of processor memory Registers Static RAM (SRAM)

Registers Register : Write requires clock and write signal

Registers Register Array of D Flip Flops Shared Write Enable bit

Register File Register file Hardware for all registers Supports Read Up to two registers Write One register at a time

Register Read Four registers Two bits to select One mux for each read select

Register Write Write needs: Register to modify Data to store Write enable signal

RAM RAM Memory 2 bits wide

RAM Decoder to select active memory address

RAM Implemented

Memory's Atom DRAM – (Memory sticks) Dynamic RAM Capacitor based Slower Smaller/Cheaper

Scaling Up 4-MB memory from 8 4-Mbit modules 22 bit address 12 bits to pick 4096 rows of memory 10 bits to pick 1 of 1024 columns from module

Counting & Control

Counting Binary count 0000 0001 0010 0011 0100 0101 … 0000 0001 0010 0011 0100 0101 … Green Flips every step When green flips to 0, flip yellow When yellow flips to 0, flip orange

Counter Counter : count ticks in binary Bit N turning off is clock signal for Bit N+1 Q’ wired to each bit’s D – Inverts each clock tick

Timer Binary clock into decoder = timing signals