A Scalable Approach to Virtual Switching

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Presentation transcript:

A Scalable Approach to Virtual Switching Bruce Richardson, Ciara Loftus et al. FOSDEM 2019

Agenda Problem Statement Current vSwitch Approaches Scalable vSwitching Performance Benefits Next Steps Q&A

Problem Statement Monolothic VMs Container-based Micro Services VNF 0 CNF 0 CNF 1 CNF 2 CNF 3 W W W W W W W W Internet Internet

Current vSwitch Approaches NF0 NF1 NF2 NF3 NF4 NF5 Challenges: Extra E-W traffic Overloading Overprovisioning vswitch vswitch V V V V Internet

Distributing the vSwitch for E-W Core 0 Core 1 Core 2 Core 3 Core 0 Core 1 Core 2 Core 3 NF0 NF1 NF2 NF3 NF0 NF1 NF2 NF3 VS VS VS VS Core N Core M vSwitch Switching capacity can scale with the number of worker cores

Inefficient Data Movement Core 1 Vswitch Core Core 2 Container 1 Container 2 Lookup tables

Efficient Direct Communication Core 1 Core 2 Container 1 Container 2 Lookup table? Lookup table?

Use Kernel for Direct Communication Core 1 Core 2 Container 1 Container 2 Kernel Lookup table

Implementation Setup – Map RX buffers to kernel Core 1 Core 2 Container 1 Container 2 Kernel

TX Path – Switch Core to Kernel Mode Container 1 Container 2 Syscall Kernel

TX Path – Lookup and Copy Core 1 Core 2 Container 1 Container 2 Syscall Kernel Buffer Copy Lookup table

Traffic Generator – IMIX @ 40G Performance Resource Pool 1 Workload encrypt encrypt P V0 V1 P 1 switch Traffic Generator – IMIX @ 40G

Within 10% of centralised vSwitch performance using 33% fewer cores Distributed vSwitch W0 W0 W1 W1 W0 W0 W1 W1 4 x 2-core workloads 4 x 2-core workload 6 x 2-core workload W2 W2 W3 W3 W2 W2 W3 W3 V0 V1 V2 V3 1 vSwitch core per workload W4 W4 W5 W5 Performance results are based on testing by Intel as of 01/17/2019 and may not reflect all publicly available security updates.  See configuration disclosure for details.  No product or component can be absolutely secure. Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products.   For more complete information visit www.intel.com/benchmarks.  Configurations: See slide #18. 31% overall system performance improvement when using Distributed vSwitch model Within 10% of centralised vSwitch performance using 33% fewer cores

Next Steps Recap Copy acceleration AF_XDP https://www.intel.com/content/www/us/en/wireless-network/accel-technology.html https://www.intel.com/content/dam/doc/white-paper/quickdata-technology-software-guide-for- linux-paper.pdf AF_XDP https://www.kernel.org/doc/html/v4.18/networking/af_xdp.html

Q & A

Backup

notices and disclaimers Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Performance varies depending on system configuration. No product or component can be absolutely secure. Tests document performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. For more complete information about performance and benchmark results, visit http://www.intel.com/benchmarks .  Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products.   For more complete information visit http://www.intel.com/benchmarks .  Intel® Advanced Vector Extensions (Intel® AVX)* provides higher throughput to certain processor operations. Due to varying processor power characteristics, utilizing AVX instructions may cause a) some parts to operate at less than the rated frequency and b) some parts with Intel® Turbo Boost Technology 2.0 to not achieve any or maximum turbo frequencies. Performance varies depending on hardware, software, and system configuration and you can learn more at http://www.intel.com/go/turbo. Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Cost reduction scenarios described are intended as examples of how a given Intel-based product, in the specified circumstances and configurations, may affect future costs and provide cost savings.  Circumstances will vary.  Intel does not guarantee any costs or cost reduction. Intel does not control or audit third-party benchmark data or the web sites referenced in this document. You should visit the referenced web site and confirm whether referenced data are accurate. Intel, the Intel logo, and Intel Xeon are trademarks of Intel Corporation in the U.S. and/or other countries. *Other names and brands may be claimed as property of others. Intel and the Intel logo are trademarks of Intel Corporation in the United States and other countries. © 2019 Intel Corporation.

Platform Configuration & Test Results Config 1 (Centralised) Config 2 (Distributed) Test by Intel Test date 01/18/2019 Platform S2600WFT # Nodes 2 # Sockets CPU Intel(R) Xeon(R) Gold 6140 CPU @ 2.30GHz Cores/socket, Threads/socket 36/72 ucode 0x2000030 HT Off Turbo BIOS version SE5C620.86B.00.01.0009.101920170742 System DDR Mem Config: slots / cap / run-speed 12 slots / 16GB / 2666 System DCPMM Config: slots / cap / run-speed - Total Memory/Node (DDR+DCPMM) 384+0 Storage - boot 1x Samsung HM161GI 160GB Drive NIC 1 x Intel® Ethernet CAN XL710 Adapter PCH Intel C624 OS Fedora 24 Kernel 4.11.12-100.fc24.x86_64 Mitigation variants (1,2,3,3a,4, L1TF) Not Mitigated Workload & version OVS – v2.10.0 (commit bb7bf0) DPDK-based prototype – baseline commit 5d08fe + patches Compiler gcc (GCC) 6.3.1 20161221 Switch Workloads PPS Delta CVS CVS 4 6379248 DVS 5780384 -9.39% 6 8372100 31.24% Performance results are based on testing by Intel as of 01/17/2019 and may not reflect all publicly available security updates.  See configuration disclosure for details.  No product or component can be absolutely secure. Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products.   For more complete information visit www.intel.com/benchmarks.  Configurations: See slide #18.