Wireless Embedded Systems

Slides:



Advertisements
Similar presentations
1 Exceptions, Interrupts & Traps Operating System Hebrew University Spring 2007.
Advertisements

I/O Unit.
CSCI 4717/5717 Computer Architecture
Interrupts What is an interrupt? What does an interrupt do to the “flow of control” Interrupts used to overlap computation & I/O – Examples would be console.
COMP3221: Microprocessors and Embedded Systems Lecture 15: Interrupts I Lecturer: Hui Wu Session 1, 2005.
8-Bit Timer/Counter 0 Counter/Timer 0 and 2 (TCNT0, TCNT2) are nearly identical. Differences: -TCNT0 can run off an external 32Khz clock (Tosc) or the.
Timers and Interrupts Shivendu Bhushan Summer Camp ‘13.
Exceptions, Interrupts & Traps
1.  8051 Timers “count up,” incrementing the Timer’s respective “count register” each time there is a triggering clock pulse. 2  When the “count register”
1 Timing System Timing System Applications. 2 Timing System components Counting mechanisms Input capture mechanisms Output capture mechanisms.
CHAPTER 5 I/O PRINCIPLE Understand the principles of System Bus
7/23 Timers in Coldfire Processor Computer Science & Engineering Department Arizona State University Tempe, AZ Dr. Yann-Hang Lee (480)
ARM Timers.
System Clocks.
MICROPROCESSOR INPUT/OUTPUT
MCU: Interrupts and Timers Ganesh Pitchiah. What’s an MCU ?
1 CS/COE0447 Computer Organization & Assembly Language Chapter 5 part 4 Exceptions.
1 COMPUTER ARCHITECTURE (for Erasmus students) Assoc.Prof. Stasys Maciulevičius Computer Dept.
Timer Timer is a device, which counts the input at regular interval (δT) using clock pulses at its input. The counts increment on each pulse and store.
13-Nov-15 (1) CSC Computer Organization Lecture 7: Input/Output Organization.
Timers and Interrupts Anurag Dwivedi. Let Us Revise.
1 © Unitec New Zealand Interrupt Lecture 6 Date: - 20 Sept, 2011 Embedded Hardware ETEC 6416.
Interrupts  An interrupt is any service request that causes the CPU to stop its current execution stream and to execute an instruction stream that services.
CSCI1600: Embedded and Real Time Software Lecture 9: Input Output Concepts Steven Reiss, Fall 2015.
Interrupt On a very basic level, an interrupt is a signal that interrupts the current processor activity. It may be triggered by an external event (change.
Interrupts.
Processor Memory Processor-memory bus I/O Device Bus Adapter I/O Device I/O Device Bus Adapter I/O Device I/O Device Expansion bus I/O Bus.
بسم الله الرحمن الرحيم MEMORY AND I/O.
Time Management.  Time management is concerned with OS facilities and services which measure real time.  These services include:  Keeping track of.
9/20/6Lecture 3 - Instruction Set - Al1 Exception Handling.
1 Device Controller I/O units typically consist of A mechanical component: the device itself An electronic component: the device controller or adapter.
Networked Embedded Systems Pengyu Zhang & Sachin Katti EE107 Spring 2016 Lecture 4 Timers and Interrupts.
1 4-Integrating Peripherals in Embedded Systems. 2 Introduction Single-purpose processors  Performs specific computation task  Custom single-purpose.
Timer modules in PIC 16F877.  The PIC 16F877 basically has three independent timer modules,  denoted by the symbols, TIMER-0, TIMER1,andTIMER2. . These.
Input / Output Chapter 9.
16F877A.
Why are Timer Functions Important?
An Interrupt is either a Hardware generated CALL (externally derived from a hardware signal) OR A Software-generated CALL (internally derived from.
Resource Management IB Computer Science.
68HC11 Interrupts & Resets.
Microprocessor Systems Design I
Networked Embedded Systems Sachin Katti
Slides developed in part by Mark Brehob & Prabal Dutta
Lesson Objectives Aims Key Words Interrupt, Buffer, Priority, Stack
Timer and Interrupts.
Operating Systems (CS 340 D)
4-Integrating Peripherals in Embedded Systems
4-Integrating Peripherals in Embedded Systems
EE 107 Fall 2017 Lecture 7 Serial Buses – I2C Direct Memory Access
Chapter 3 Top Level View of Computer Function and Interconnection
IRQ, DMA and I/O Ports - Introduction -
8-Bit Timer/Counter 0 Counter/Timer 0 and 2 (TCNT0, TCNT2) are nearly identical. Differences: -TCNT0 can run off an external 32Khz clock (Tosc) or the.
ECE 3430 – Intro to Microcomputer Systems
8253 Timer In software programming of 8085, it has been shown that a delay subroutine can be programmed to introduce a predefined time delay. The delay.
* * * * * * * 8051 Interrupts Programming.
Interrupt Driven I/O References Text: Tanenbaum ch.1.4.3, ch Receiver Interrupt Program Example:
Interrupts, Tasks and Timers
GEOMATIKA UNIVERSITY COLLEGE CHAPTER 2 OPERATING SYSTEM PRINCIPLES
Processor Fundamentals
11.1 Interrupt Mechanism, Type, and Priority
COMPUTER PERIPHERALS AND INTERFACES
Md. Mojahidul Islam Lecturer Dept. of Computer Science & Engineering
Md. Mojahidul Islam Lecturer Dept. of Computer Science & Engineering
Interrupt handling Explain how interrupts are used to obtain processor time and how processing of interrupted jobs may later be resumed, (typical.
ECE 3430 – Intro to Microcomputer Systems
Wireless Embedded Systems
Computer System Overview
Lecture 7 System architecture Input-output
COMP3221: Microprocessors and Embedded Systems
Chapter 13: I/O Systems “The two main jobs of a computer are I/O and [CPU] processing. In many cases, the main job is I/O, and the [CPU] processing is.
Presentation transcript:

Wireless Embedded Systems CSE190 Winter 2019 Lecture 3 Time and Interrupts Wireless Embedded Systems Aaron Schulman

What time is the Apple Watch tracking? How often | Granularity Clock (all the time | sec) Alarm (all the time | sec) Stopwatch (when open | msec) Sync (all the time | sec) UI (when open | msec) Buzzer (when buzzing | msec) WiFi (when communicating | usec)

Why do we need timers? In this project, we need timers for Determining when to change the bits 20 Hz means change bits every 50 milliseconds How to measure 50 ms? Option 1: Use the timer hardware to let you know when 50 ms has passed. Option 2: Count how many processor cycles it would take to equal 50 ms.

Why do we need timers? In general, why do we need timers? What time is it now? How much time has elapsed since I last checked? Let me know when this much time passes. When did this external input occur?

What peripherals do we use to track time? (all the time | sec) - [Alarm, Sync] 32-bit Real time clock (RTC) peripheral with interrupts (when open/buzzing | msec) - [Stopwatch, UI, Buzzer] Processor’s timer peripheral with interrupts (when communicating | usec) - [WiFi] WiFi chip’s internal timer peripheral with interrupts

What peripherals do we use to track time? (all the time | sec) - [Alarm, Sync] 32-bit Real time clock (RTC) peripheral with interrupts (when open/buzzing | msec) - [Stopwatch, UI, Buzzer] Processor’s timer peripheral with interrupts (when communicating | usec) - [WiFi] WiFi chip’s internal timer peripheral with interrupts The term is used to avoid confusion with ordinary hardware clocks which are only signals that govern digital electronics, and do not count time in human units.

The internal structure of a timer peripheral Application Software Timer Abstractions and Virtualization Low-Level Timer Device Drivers Software Hardware R/W R/W R/W Compare Counter Capture The purpose of the prescaler is to allow the timer to be clocked at the rate a user desires. Prescaler Clock Driver Internal External Xtal/Osc Frequency depends on the attached oscillator device Figure adapted from Prabal Dutta’s EE373 slides

How does the number in the counter register correspond to wall clock time? Frequency (Hz) = Cycles / Second 1 / Frequency (Hz) = Seconds / Cycle The counter is incremented once per cycle. You read 100 from the counter register which is clocked by a 1 MHz oscillator. How much time has passed since the counter was reset?

How should we choose the OSC frequency? For timers, there will often be a tradeoff between resolution (high resolution requires a high clock rate) and range (high clock rates cause the timer to overflow more quickly). 1MHz OSC: resolution = 1 / 1e6 second = 1us 10MHz OSC: resolution = 1/10e6 second = 0.1us 16-bits timer: 1MHz OSC: max range = 1 / 1e6 * 2^16 = 65.536ms 10MHz OSC: max range = 1/10e6 * 2^16 = 6.5536ms

How does a firmware developer use the compare register? Stop the timer Set the compare register with the time it should fire Reset the counter Start the timer Wait for the counter to reach the compare (via interrupt or check status reg)

How does a firmware developer use the capture register? Stop the timer Setup the timer to capture when a particular event occurs (e.g., change of GPIO pin) Reset the counter Start the timer Wait for the counter to reach a capture event (via interrupt or check status reg)

The internal structure of a Real Time Clock (RTC) Note: RTCs have their own oscillator. Why is it 32,768 kHz? Figure adapted from Prabal Dutta’s EE373 slides

The internal structure of a Real Time Clock (RTC) Note: RTCs have their own oscillator. Why is it 32,768 kHz? The reason the 32,768 Hz resonator has become so common is due to a compromise between the large physical size of low frequency crystals and the large current drain of high frequency crystals. Figure adapted from Prabal Dutta’s EE373 slides

How peripherals notify the CPU that their state just changed. Interrupts How peripherals notify the CPU that their state just changed. Example: A button just pressed

Interrupts Definition An event external to the currently executing process that causes a change in the normal flow of instruction execution; usually generated by hardware devices external to the CPU. Key point is that interrupts are asynchronous w.r.t. current process Typically indicate that some device needs service Slides from Angela Demke Brown CSC 469H1F

Why interrupts? MCUs have many external peripherals Keyboard, mouse, screen, disk drives, scanner, printer, sound card, camera, etc. These devices occasionally need CPU service But we can’t predict when We want to keep the CPU busy (or asleep) between events Need a way for CPU to find out devices need attention Slides from Angela Demke Brown CSC 469H1F

Possible Solution: Polling CPU periodically checks each device to see if it needs service “Polling is like picking up your phone every few seconds to see if you have a call. …” Slides from Angela Demke Brown CSC 469H1F

Possible Solution: Polling CPU periodically checks each device to see if it needs service “Polling is like picking up your phone every few seconds to see if you have a call. …” Cons: takes CPU time even when no requests pending Pros: can be efficient if events arrive rapidly Slides from Angela Demke Brown CSC 469H1F

Alternative: Interrupts Give each device a wire (interrupt line) that it can use to signal the processor

Alternative: Interrupts Give each device a wire (interrupt line) that it can use to signal the processor When interrupt signaled, processor executes a routine called an interrupt handler to deal with the interrupt No overhead when no requests pending

What is the benefit of having a separate controller for interrupts? How do interrupts work? Interrupt  Clear interrupt Peripheral 1  Peripheral P sends int X  ACK P’s int X  Execute P’s X handler  ACK P’s int X Peripheral 2 Interrupt controller CPU Peripheral 3 What is the benefit of having a separate controller for interrupts? Peripheral 4

The Interrupt controller Handles simultaneous interrupts Receives interrupts while the CPU handles interrupts Maintains interrupt flags CPU can poll interrupt flags instead of jumping to a interrupt handler Multiplexes many wires to few wires CPU doesn’t need a interrupt wire to each peripheral Fun fact: Interrupt controllers used to be separate chips! Intel 8259A IRQ chip Image by Nixdorf - Own work

How to use interrupts Tell the peripheral which interrupts you want it to output. Tell the interrupt controller what your priority is for this interrupt. Tell the processor where the interrupt handler is for that interrupt. When the interrupt handler fires, do your business then clear the int.

CPU execution of interrupt handlers Wait for instruction to end Push the program counter to the stack Push all active registers to the stack Jump to the interrupt handler in the interrupt vector Pop the program counter off of the stack