Unit 1.1 System Architecture Lesson 2

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Presentation transcript:

Unit 1.1 System Architecture Lesson 2

Big Picture How are instructions executed by the processor? What is the purpose of the processor? Where are instructions that are currently in use stored? What else is stored in main memory? How are instructions executed by the processor?

Learning Objectives To be able to label an internal diagram of the CPU To be able to describe the roles of the MAR and the MDR in the fetch part of the fetch-execute cycle To be able to describe the purpose of the accumulator To be able to explain the purposes of the ALU, CU and the cache The describe the importance of the Program Counter in the Fetch-Execute cycle

Engagement - Activity 1 On the Diagram Given… Use research to try and identify the terms on the sheet Write the definitions/explanations of what they do in the boxes Then try and label the diagram accurately

Activity 1 - Answers Processor Main Memory 0001 INP Address Bus 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 INP Add 5 STO 8 ADD 8 PC MAR CIR MDR Data Bus ALU Accumulator

Key Words Von Neumann Architecture ALU (Arithmetic Logic Unit) MAR (Memory Address Register) MDR (Memory Data Register) Program Counter Accumulator ALU (Arithmetic Logic Unit) CU (Control Unit) Cache Fetch/Execute Busses

Computer Systems Internal Components The processor Main memory (RAM, ROM, EEPROM) I/O controllers Buses External components (peripherals) Keyboard, mouse, printer, disk drives I/O Devices / I/O Ports Secondary Storage

The Processor The “brains” of the computer Carries out instructions (Executes Instructions) Processes Data Retrieves Data/Instructions from Main Memory (Fetch) Stores Data into Main Memory once Executed

Main Memory RAM – Random Access Memory Holds Data and Instructions that are currently in use by the processor Located on the Motherboard Directly Accessible by the processor All data/instructions are lost once power is turned off

Main Memory ROM – Read Only Memory Instructions are permanently etched onto a ROM Chip When power is turned off – instructions still remain on the ROM chip. Bootstrap Loader is held in ROM Gives the instructions to start up the Operating System

Main Memory EEPROM – Electronically Erasable Programmable Read Only Memory E.g. Sim cards / Flash Memory Instructions/Data can be erased electronically and replaced

I/O Controllers These are used to allow an interface between a hardware device external to the motherboard (e.g. a Keyboard) and the Processor itself. I/O controllers are used for: Keyboard, Mouse, Disk Drive, VDU

System Busses A bus is a set of parallel wires connecting two or more independent components of a computer system in order to pass signals between them. The System is split into three separate busses: The data bus The address bus The control bus

Address Bus Carries addresses from the Processor to main memory or other I/O devices It is one direction (Uni-Directional) The processor generates an address All data/Instructions are returned on the Data Bus

Data Bus Carries Data/Instructions from Main Memory to the Processor (or from other secondary storage devices) to the processor. Bi-Directional (two way) Data can be read/written

Control Bus Control signals are sent along the control bus E.g. Memory Read, Memory Write This instructs which was data will be travelling to/from memory.

Peripherals Peripherals are any devices that are not directly connected to the CPU E.g. mouse, keyboard, printer, hard disk drive, cd-rom drive These devices are known as I/O devices (Input/Output Devices)

I/O Ports I/O Ports allow communication from an I/O device and the motherboard (hence CPU)

Secondary Storage Used for long term storage of data and instructions Hard Disk Drive Solid State Drive Flash Memory DVD-R Blu-ray

A Computer System Processor Main Memory I/O 1945: John Von Neumann

Processor Control bus (read/write Signals) Processor Main Memory Address bus System Clock Hz Data bus

What Happens in the Fetch – Decode – Execute cycle? Fetch part of the cycle Program counter is incremented for each instruction of the program being executed The contents of the Program Counter are put into the MAR (Memory Address Register) The address is transferred along the Address Bus to Main Memory (this address indicates which part of memory to fetch the data/instructions from

What Happens in the Fetch – Decode – Execute cycle? Fetch part of the cycle The data/instruction that has been addressed is transferred back to the processor along the data bus This is held in the Memory Data Register The instruction would then be transferred to the Current Instruction Register.

Processor - Registers PC – Program Counter Holds the location of the next instruction/data address in Main Memory MAR – Memory Address Register The contents of the PC are copied here and then transferred along the Address Bus Main Memory PC MAR Address Bus

Processor - Registers MDR – Memory Data Register Once Data/Instructions are brought from the Memory Address in Main Memory – they are placed in the MDR. CIR – Current Instruction Register The instructions stored in the MDR are copied here Main Memory CIR MDR Data Bus

What Happens in the Fetch – Decode – Execute cycle? Decode / Execute Part The instruction to be decoded is held in the Current Instruction Register The instruction is split into an Op-Code and an Operand The instruction is carried out by the ALU (Arithmetic Logic Unit)

Executing Instructions ALU (Arithmetic Logic Unit) Performs arithmetic and logical operations including +, -, AND, OR Accumulator Results of calculations are placed into the Accumulator Accumulator ALU

Activity 2 Produce a Labelled Diagram of the Internal Components of a Computer System See Lesson 2 Activity 2 In Pairs Describe in words how the Fetch-Execute Cycle Works

Activity 3 – FDE Cycle

Control Unit Sends Control Signals between the different internal components Memory Read Memory Write Hard Disk Drive Read I/O Write

Plenary Questioning Produce Question + Mark Scheme Exit Pass – Describe the differences between the registers on the processor Exit Pass – Describe the differences between the ALU and the CU

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