EGC 442 Introduction to Computer Architecture

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Presentation transcript:

EGC 442 Introduction to Computer Architecture 4/4/2019 EGC220 Class Notes 11/26/2018 Baback Izadi Division of Engineering Programs bai@engr.newpaltz.edu Chapter 1 — Computer Abstractions and Technology

Test result Average Median Test1 Test2 MAX Minimum #### 78.4 75.2 83.0 #### 78.4 75.2 Median 83.0 78.0 MAX 96.0 94.0 Minimum 34.0 47.0

Design of Sequential Circuits Design Procedure: Word description. State diagram. Assign binary values. Decide on type of flip flops. Excitation table for the flip flop. State table. Generate simplified logic equations for flip flop inputs and system outputs. Draw logic diagram.

Flip-Flop Excitation Tables PRESENT STATE NEXT STATE S R Q(t) Q(t+1) X 1 Q(t) Q(t+1) T 1 PRESENT STATE NEXT STATE J K Q(t) Q(t+1) X 1 Q(t) Q(t+1) D 1

Problem 1 Using JK flip flops, design an up/down synchronous counter that counts from 3 to 7.

Problem Using SR flip-flops, design a circuit for the following state diagram.

Using D flip-flops, design a circuit for the following state diagram Using D flip-flops, design a circuit for the following state diagram. You may make the following state assignments: S0 = 00, S1 = 10, S2 = 11, S3 = 01

Problem 3 Using D flip-flops, design a circuit for the following state diagram. You may make the following state assignments: S0 = 00, S1 = 10, S2 = 11, S3 = 01