March 2006 Saeid Nooshabadi

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March 2006 Saeid Nooshabadi saeid@unsw.edu.au ELEC2041 Microprocessors and Interfacing Lecture 7: Number Systems – II Extras http://webct.edtec.unsw.edu.au/ March 2006 Saeid Nooshabadi saeid@unsw.edu.au

Overview Condition Code Flag interpretation

Review: int and unsigned int in C With N bits we can represent 2N different Numbers: 2N numbers 0 to 2N - 1 :Only zero and Positive numbers 2N numbers -2N/2 to 0 to 2N/2- 1: Both Negative and positive numbers in 2’s Complement 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 4 5 6 7 -8 -7 -6 -5 -4 -3 -2 -1 Is 1000 > 0110 ? 1000 > 0110 if only +ve representation used 1000 < 0110 if both +ve and -ve representation in 2’s complement used

Review: Condition Flags Flags Arithmetic Instruction Negative Bit 31 of the result has been set (N=‘1’) Indicates a negative number in signed operations Zero Result of operation was zero (Z=‘1’) Carry Result was greater than 32 bits (C=‘1’) oVerflow Result was greater than 31 bits (V=‘1’) Indicates a possible corruption of the sign bit in signed numbers N flag SUB r0, r1, r2 where r1<r2 Z flag SUB r0, r1, r2 where r1=r2 (also used for results of logical operations) C flag ADD r0, r1, r2 where r1+r2>0xFFFFFFFF V flag ADD r0, r1, r2 where r1+r2>0x7FFFFFFF (if numbers are signed, ALU sign bit will be corrupted) (0x7FFFFFF+0x00000001=0x80000000) (answer okay for unsigned but wrong for signed)

`Experimentation with Condition Flags (#1/5) Indicate the changes in N, Z, C, V flags for the following arithmetic operations: (Assume 4 bit-numbers) 0010 0011 + 00101 =  Overflow, V = 0 = 0  Carry set, C = 0 Result Not Zero Z = 0 = 0  Result +Ve N = 0 N flag SUB r0, r1, r2 where r1<r2 Z flag SUB r0, r1, r2 where r1=r2 (also used for results of logical operations) C flag ADD r0, r1, r2 where r1+r2>0xFFFFFFFF V flag ADD r0, r1, r2 where r1+r2>0x7FFFFFFF (if numbers are signed, ALU sign bit will be corrupted) (0x7FFFFFF+0x00000001=0x80000000) (answer okay for unsigned but wrong for signed) Signed interpretation: 3 + 2 = 5. The number is within of the range of –8 to +7. No oVerflow (V) Unsigned interpretation: 3 + 2 = 5. The number is within the range of the range of 0 to +15. Carry NotSet, NoOverflow (C)

Experimentation with Condition Flags (#2/5) Indicate the changes in N, Z, C, V flags for the following arithmetic operations: (Assume 4 bit-numbers) 1110 1111 + 0010 10001 =  No Overflow, V = 0 NOTE: V = MSB Carry In (XOR) MSB Carry out = 1  Carry set, C = 1 Result Not Zero Z = 0 = 0  Result +Ve N = 0 N flag SUB r0, r1, r2 where r1<r2 Z flag SUB r0, r1, r2 where r1=r2 (also used for results of logical operations) C flag ADD r0, r1, r2 where r1+r2>0xFFFFFFFF V flag ADD r0, r1, r2 where r1+r2>0x7FFFFFFF (if numbers are signed, ALU sign bit will be corrupted) (0x7FFFFFF+0x00000001=0x80000000) (answer okay for unsigned but wrong for signed) Signed interpretation: -1 + 2 = 1. The number is within the range of –8 to +7. No oVerflow (V) Unsigned interpretation: 15 + 2 = 17. The number is out of the range of 0 to +15. Carry Set, Overflow (C)

`Experimentation with Condition Flags (#3/5) Indicate the changes in N, Z, C, V flags for the following arithmetic operations: (Assume 4 bit-numbers) 0110 0111 + 0010 01001   Overflow, V = 1 NOTE: V = MSB Carry In (XOR) MSB Carry out = 0  Carry set, C = 0 Result Not Zero Z = 0 = 1  Result -Ve N = 1 N flag SUB r0, r1, r2 where r1<r2 Z flag SUB r0, r1, r2 where r1=r2 (also used for results of logical operations) C flag ADD r0, r1, r2 where r1+r2>0xFFFFFFFF V flag ADD r0, r1, r2 where r1+r2>0x7FFFFFFF (if numbers are signed, ALU sign bit will be corrupted) (0x7FFFFFF+0x00000001=0x80000000) (answer okay for unsigned but wrong for signed) Signed interpretation: 7 + 2 = 9. The number is out of the range of –8 to +7. oVerflow (V) Unsigned interpretation: 7 + 2 = 9. The number is within the range of 0 to +15. Carry NotSet, NoOverflow (C)

Experimentation with Condition Flags (#4/5) Indicate the changes in N, Z, C, V flags for the following arithmetic operations: (Assume 4 bit-numbers) 1000 1110 + 1110 + 1001  1001 10111   OVerflow, V = 1 = 1  Carry set, C = 1 Result Not Zero Z = 0 = 0  Result +Ve N = 0 N flag SUB r0, r1, r2 where r1<r2 Z flag SUB r0, r1, r2 where r1=r2 (also used for results of logical operations) C flag ADD r0, r1, r2 where r1+r2>0xFFFFFFFF V flag ADD r0, r1, r2 where r1+r2>0x7FFFFFFF (if numbers are signed, ALU sign bit will be corrupted) (0x7FFFFFF+0x00000001=0x80000000) (answer okay for unsigned but wrong for signed) Signed interpretation: -2 - 7 = = -2 + (-7) =-9. The number is out of the range of –8 to +7. oVerflow (V) Unsigned interpretation: 14 + 9 = 23. The number is out of the range of 0 to +15. Carry Set, Overflow (C)

Experimentation with Condition Flags (#5/5) Indicate the changes in N, Z, C, V flags for the following arithmetic operations: (Assume 4 bit-numbers) 1000 1110 - 1110 + 0111  1001 10111   OVerflow, V = 1 = 1  Carry set, C = 1 Result Not Zero Z = 0 = 0  Result +Ve N = 0 Note: For Subtraction Carry Set means No Overflow (No Borrow) N flag SUB r0, r1, r2 where r1<r2 Z flag SUB r0, r1, r2 where r1=r2 (also used for results of logical operations) C flag ADD r0, r1, r2 where r1+r2>0xFFFFFFFF V flag ADD r0, r1, r2 where r1+r2>0x7FFFFFFF (if numbers are signed, ALU sign bit will be corrupted) (0x7FFFFFF+0x00000001=0x80000000) (answer okay for unsigned but wrong for signed) Signed interpretation: -2 - 7 = = -2 + (-7) =-9. The number is out of the range of –8 to +7. oVerflow (V) Unsigned interpretation: 14 - 7 = 7. The number is within the range of 0 to +15. Carry Set, NoOverflow (C) .

Signed /Unsigned Overflow Summary Signed Arithmetic overflow Condition: oVerflow flag V = 0 NO OVERFLOW oVerflow flag V = 1 OVERFLOW NOTE: V = MSB Carry In (XOR) MSB Carry out UnSigned Arithmetic overflow Condition: Addition: (Carry flag C = 0) NO OVERFLOW (Carry flag C = 1) OVERFLOW Subtraction: (Carry flag C = 0) OVERFLOW (Carry flag C = 1) NO OVERFLOW N flag SUB r0, r1, r2 where r1<r2 Z flag SUB r0, r1, r2 where r1=r2 (also used for results of logical operations) C flag ADD r0, r1, r2 where r1+r2>0xFFFFFFFF V flag ADD r0, r1, r2 where r1+r2>0x7FFFFFFF (if numbers are signed, ALU sign bit will be corrupted) (0x7FFFFFF+0x00000001=0x80000000) (answer okay for unsigned but wrong for signed)