Basic MIPS Implementation

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Presentation transcript:

Basic MIPS Implementation Here's an updated view of the basic architecture needed to implement a subset of the MIPS environment: We've seen how most of the necessary components can be implemented. The control logic is needed to manage execution of instructions remains. Computer Science Dept Va Tech January 2006 ©2006 McQuain WD

Control Selecting the operations to perform (ALU, read/write, etc.) Controlling the flow of data (multiplexor inputs) Information comes from the 32 bits of the instruction: add $8, $17, $18 100000 00000 01001 10010 10001 000000 funct shamt rd rt rs op ALU's operation based on instruction type and function code Computer Science Dept Va Tech January 2006 ©2006 McQuain WD

Control E.g., what should the ALU do with this instruction: lw $1, 100($2) 100011 00010 00001 0000000001100100 op rs rt offset ALU control input 0000 AND 0001 OR 0010 add 0110 subtract 0111 set-on-less-than 1100 NOR Why is the code for subtract 0110 and not 0011? Computer Science Dept Va Tech January 2006 ©2006 McQuain WD

Computing Instruction Type Instruction Opcode Type ------------------------------- LW 100011 00 I SW 101011 00 I BEQ 000100 01 J ADD 000000 00 R SUB 000000 00 R AND 000000 00 R OR 000000 00 R SLT 000000 00 R Computer Science Dept Va Tech January 2006 ©2006 McQuain WD

Simplifying: Don't Cares Instruction Opcode Minimize Type ----------------------------------------------- LW 100011 1XX0XX 00 I SW 101011 1XX0XX 00 I BEQ 000100 0XX1XX 01 J ADD 000000 0XX0XX 00 R SUB 000000 0XX0XX 00 R AND 000000 0XX0XX 00 R OR 000000 0XX0XX 00 R SLT 000000 0XX0XX 00 R Computer Science Dept Va Tech January 2006 ©2006 McQuain WD

Computing ALU Settings Supported Instruction ALUop Funct ALU Control Settings ---------------------------------------------- LW 00 0010 SW 00 0010 BEQ 01 0110 ADD 10 100000 0010 SUB 10 100010 0110 AND 10 100100 0000 OR 10 100101 0001 SLT 10 101010 0111 Computer Science Dept Va Tech January 2006 ©2006 McQuain WD

Don't Care Conditions Supported Instruction ALUop Funct ALU Control Settings ---------------------------------------------- LW 00 XXXXXX 0010 SW 00 XXXXXX 0010 BEQ X1 XXXXXX 0110 ADD 1X XX0000 0010 SUB 1X XX0010 0110 AND 1X XX0100 0000 OR 1X XX0101 0001 SLT 1X XX1010 0111 Computer Science Dept Va Tech January 2006 ©2006 McQuain WD

Control Must describe hardware to compute 4-bit ALU control input given instruction type 00 = lw, sw 01 = beq, 10 = arithmetic function code for arithmetic Describe it using a truth table (can turn into gates): ALUOp computed from instruction type Computer Science Dept Va Tech January 2006 ©2006 McQuain WD

Datapath Details Computer Science Dept Va Tech January 2006 ©2006 McQuain WD

Datapath Control Line Logic Computer Science Dept Va Tech January 2006 ©2006 McQuain WD

Control Simple combinational logic (truth tables) Computer Science Dept Va Tech January 2006 ©2006 McQuain WD

Breaking down an instruction ISA definition of arithmetic: Reg[Memory[PC][15:11]] <= Reg[Memory[PC][25:21]] op Reg[Memory[PC][20:16]] Could break down to: IR <= Memory[PC] A <= Reg[IR[25:21]] B <= Reg[IR[20:16]] ALUOut <= A op B Reg[IR[20:16]] <= ALUOut We forgot an important part of the definition of arithmetic! PC <= PC + 4 Computer Science Dept Va Tech January 2006 ©2006 McQuain WD