Lecture 15 OUTLINE The MOS Capacitor Energy band diagrams Reading: Pierret 16.1-16.2, 18.1; Hu 5.1

MOS Capacitor Structure (cross-sectional view) Most MOS devices today employ: degenerately doped polycrystalline Si (“poly-Si”) as the “metallic” gate-electrode material n+-type for “n-channel” transistors p+-type, for “p-channel” transistors SiO2 as the gate dielectric band gap = 9 eV er,SiO2 = 3.9 Si as the semiconductor material p-type, for “n-channel” transistors n-type, for “p-channel” transistors GATE xo Semiconductor + VG _ EE130/230A Fall 2013 Lecture 15, Slide 2

Bulk Semiconductor Potential, fF p-type Si: n-type Si: Ec Ei qfF EF Ev Ec EF |qfF| Ei Ev EE130/230A Fall 2013 Lecture 15, Slide 3

Special Case: Equal Work Functions FM = FS R. F. Pierret, Semiconductor Device Fundamentals, Fig. 16.2 EE130/230A Fall 2013 Lecture 15, Slide 4

General Case: Different Work Functions R. F. Pierret, Semiconductor Device Fundamentals, Fig. 18.1 E0 E0 E0 E0 EE130/230A Fall 2013 Lecture 15, Slide 5

MOS Band Diagrams: Guidelines Fermi level EF is flat (constant with x) within the semiconductor Since no current flows in the x direction, we can assume that equilibrium conditions prevail Band bending is linear within the oxide No charge in the oxide => dE/dx = 0 so E is constant => dEc/dx is constant From Gauss’ Law, we know that the electric field strength in the Si at the surface, ESi, is related to the electric field strength in the oxide, Eox: E E E EE130/230A Fall 2013 Lecture 15, Slide 6

MOS Band Diagram Guidelines (cont’d) The barrier height for conduction-band electron flow from the Si into SiO2 is 3.1 eV This is equal to the electron-affinity difference (cSi and cSiO2) The barrier height for valence-band hole flow from the Si into SiO2 is 4.8 eV The vertical distance between the Fermi level in the metal, EFM, and the Fermi level in the Si, EFS, is equal to the applied gate voltage (assuming that the Si bulk is grounded): EE130/230A Fall 2013 Lecture 15, Slide 7

MOS Equilibrium Band Diagram metal oxide semiconductor n+ poly-Si SiO2 EC p-type Si EC=EFM EFS EV EV EE130/230A Fall 2013 Lecture 15, Slide 8

Flat-Band Condition The flat-band voltage, VFB, is the applied voltage which results in no band-bending within the semiconductor. Ideally, this is equal to the work-function difference between the gate and the bulk of the semiconductor: qVFB = FM  FS EE130/230A Fall 2013 Lecture 15, Slide 9

Voltage Drops in the MOS System In general, where qVFB = FMS = FM – FS Vox is the voltage dropped across the oxide (Vox = total amount of band bending in the oxide) fs is the voltage dropped in the silicon (total amount of band bending in the silicon) For example: When VG = VFB, Vox = fs = 0, i.e. there is no band bending EE130/230A Fall 2013 Lecture 15, Slide 10

MOS Operating Regions (n-type Si) Decrease VG toward more negative values  the gate electron energy increases relative to that in the Si decrease VG decrease VG Accumulation VG > VFB Electrons accumulated at Si surface Depletion VG < VFB Electrons depleted from Si surface Inversion VG < VT Surface inverted to p-type EE130/230A Fall 2013 Lecture 15, Slide 11 R. F. Pierret, Semiconductor Device Fundamentals, Fig. 16.5

MOS Operating Regions (p-type Si) increase VG increase VG VG = VFB VG < VFB VT > VG > VFB EE130/230A Fall 2013 Lecture 15, Slide 12 R. F. Pierret, Semiconductor Device Fundamentals, Fig. 16.6