Reading and writing to data memory rs Imm Lw rt Imm(rs) 5 16 Register file Sign extend Offset 32 Base address + Data address to data memory
Reading and writing to data memory Lb rt Imm(rs) Address (32 bits) Data (8 bits) Data memory Sign extension Lbu: Zero extend There are also Lh and Lhu
Reading and writing to data memory Sw rt Imm(rs) Sh rt Imm(rs) Sb rt Imm(rs) Remember: Alignment for Sw and Sh
Read and write from/ to the data memory Lw rt Imm(rs) Sw rt Imm(rs) Lh rt Imm(rs) Sh rt Imm(rs) Lhu rt Imm(rs) Lb rt Imm(rs) Sb rt Imm(rs) Lbu rt Imm(rs)
Zero ext. Branch logic A ALU 4 B + 31 + Sgn/Ze extend Lw rt Imm(rs)
Zero ext. Branch logic A ALU 4 B + 31 + Sgn/Ze extend Lw rt Imm(rs)
Lw rt Imm(rs) Read Data Zero ext. Branch logic A ALU 4 B + 31 + Sgn/Ze A ALU 4 B + 31 + Sgn/Ze extend Lw rt Imm(rs) Read Data
Lw rt Imm(rs) … next instr Zero ext. Branch logic A ALU 4 B + 31 + Sgn/Ze extend Lw rt Imm(rs) … next instr
Zero ext. Branch logic A ALU 4 B + 31 + Sgn/Ze extend Sw rt Imm(rs)
Sw rt Imm(rs) Write Data Zero ext. Branch logic A ALU 4 B + 31 + Sgn/Ze extend Sw rt Imm(rs) Write Data