Question 0: Register Files Complete the register transfer operations listed below implemented by the given register file AA BA DA WR RD Operation 01 10 00 1 11 1 1
Answer Questions 1,2 and 3 using the following 16-bit Instruction Formats Opcode Operands Function ADD RD,RA,RB 0000000 RD RA RB R[DR]←R[SA]+R[SB] SUB RD,RA,RB 0000001 R[DR]←R[SA]-R[SB] DCR RD,RA 0000011 xxx R[DR]←R[SA] -1 INC RD,RA 0000010 R[DR]←R[SA] +1 AND RD,RA,RB 0001001 R[DR]←R[SA] R[SB] OR RD,RA,RB 0001010 R[DR]←R[SA] R[SB] MOV RD,RA 0000111 R[DR]←R[SA] ST RD,offset(RA) 1100000 Oper M[R[SA]+Oper] ← R[SB] LD RD,offset(RA) 1010000 Oper. R[DR]←M[R[SA]+Oper] LDI RD,operand 0110111 RD OperH OperL R[DR]←se || Operand ADI RD,RA,operand 0010000 RA Oper. R[DR]←R[SA] + se || Operand SUI.U RD,RA,operand 0010001 R[DR]←R[SA] - zf || Operand BZ offset 1110000 Address Offset If R[SA]=0 GOTO [PC+offset] BNZ offset 1110001 If R[SA]≠0 GOTO [PC+offset] JMP offset 1111000 GOTO [PC+offset]
Question 1 What is the range of numbers that can be used by the signed arithmetic operations (such as ADI R3,R2,N)? What is the range of numbers that can be used by the unsigned arithmetic operations (such as ADI.U R3,R2,N)? What is the range of numbers that can be loaded in a register using the LDI instruction? What is the range of numbers that can be loaded in a register using the LDI.U instruction? What is the maximum number of bits by a which a number can be shifted? What is the maximum forward displacement (Distance between current to next instruction) of a conditional branch instruction? What is the maximum backward displacement (Distance between current to next instruction) of a conditional branch instruction? What is the maximum size of data memory supported by the proposed ISA? Write a sequence of instructions that can implement the C-instructions “short int x=-101;” and “unsigned short int y = 132;”. Use register R0 as a data memory pointer initialized to the address 0x90, and that the address of x is 0x92 and the address of y is 0x95. Assume that the size of all registers and “short int” is 8 bits.
Q2. Determine the machine codes for the following program Assembly Opcode Operands Address m/c Codes LDI R2,26 0100 LDI R4,-18 ST R1,1(R2) L0: LD R3,2(R1) MOV R5,R2 SUB R4,R5,R2 BZ L2 L1 INC R4,R3 LD R2,3(R1) BNZ L3 BZ L1 L2: SUI R4,R2,3 INC R2,R4 ADD R4,R2,R2 JMP L0 L3: ST R1,2(R4)
Q3. Disassembly the following program Address m/c Code Opcode Operands Assembly 100 0EA8 L0: 102 06D0 L1: 104 E212 L2: 106 0170 L3: 108 E1F6 L4: 10A 23B3 L5: 10C 131A L6: 10E A023 L7: 110 0120 L8: 112 A063 L9: 114 0248 L10: 116 E3EE L11: 118 C062 L12: 11A F1E6 L13:
For the next three questions consider the following datapath
Control Word to Micro-operation Examples Determine the microoperation for the following control words: Control Word DA AA BA MB FS3..0 MD RW Micro-operation 6C11 E215 36A1 4801 D5C0 2143 3975 2545 3CDD
Micro-operation to Control Word Examples Determine the control word for the following microoperations: Micro-operation DA AA BA MB FS4..0 MD RW Control Word R1 R2 - R5 R6 DCR(R7) R4 R5 + 3 R1 R2 xor R3 R2 Data In=M[R5+2] M[R2+1] Dout = R3 R3 LSL (R5,2) R2 -6 R6 R1-R4-Cy R5 - (R3)
Control Word to Micro-operation Examples Determine the microoperation and the content of the destination register location after the sequence of the following control words is applied to the datapath. Assume that the initial values of the registers and memory are as shown Assume also that the control words are applied sequentially on the datapath Reg. Data Addr. R0 3C 88 35 R1 24 89 65 R2 6A 8A A4 R3 58 8B 4C R4 8C R5 10 8D 33 R6 C9 8E 98 R7 1F 8F 1A 90 2C 91 F1 92 3E 93 50 94 3A 95 77 96 97 45 C.Word DA AA BA MB FS3..0 MD RW Micro-op. Result 0F01 5143 66E5 F1C0 B975 C605 E419