Latches and Flip-Flops 2

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Presentation transcript:

Latches and Flip-Flops 2 ©Paul Godin Created September 2007 Last Edit Aug 2013

Review: Steering Gates The flow of logic can be controlled with a logic gate. The NAND as a steering gate inverts the input. 1 1 Signal 1 Control 1 ANIMATED

Review: Steering Gates A control input ‘0’ inhibits the signal. 1 1 Signal 1 1 Control ANIMATED

Steering Gates in Pairs 1 1 Signal 1 1 Control 1 1 Signal 1 Output Enabled (inverted) ANIMATED

Steering Gates in Pairs 1 1 Signal 1 1 Control 1 1 1 Signal 1 Output Disabled ANIMATED

Transparent SR Latch A Transparent latch has an additional “control” input that enable or disable the input signals. Control S R Q

Transparent SR Latch The Transparent SR Latch is also known as: Gated SR Latch Enabled SR Latch The Control (Enable) input of the Transparent SR Latch Controls when the SR inputs are read Places the Latch in a hold state

Transparent Latch The control (steering) gates invert the input. The latch portion is active-low but the input to the transparent latch is active high. Control S R Q

“X” is “don’t care” or “doesn’t matter” Gated SR Latch The enable input can be used to disable further SR inputs to the device, leaving it in a hold state. En S R Q Q’ Mode 1 Hold Reset Set ? Invalid X Disabled S R Q En “X” is “don’t care” or “doesn’t matter”

Exercise 1: Complete the timing diagram Q En En S R Q Q

Exercise 2: Complete the timing diagram Q En En S R Q Q

D Latch The problem with the SR Latch is that it requires two inputs to store one value. A latch is needed where one input is applied to store one value. A control input is also required to place the device in a hold state.

D Latch This device has one input to store one value (D), and an input to hold that value (Enable). Enable D Q S R

This device is the foundation of digital memory. Gated D Latch “When enabled, whatever appears on D appears on Q”. En D Q Q’ Mode 1 Reset Set X Disabled D Q En This device is the foundation of digital memory.

Exercise 3: Complete the timing diagram Q En En D Q Q

END ©Paul R. Godin prgodin°@ gmail.com