Memory and Repetitive Arithmetic Machines

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Presentation transcript:

Memory and Repetitive Arithmetic Machines Prof. Sirer CS 316 Cornell University

Memory Various technologies Static-RAM Dynamic-RAM Non-Volatile RAM S-RAM, D-RAM, NV-RAM Static-RAM So called because once stored, data values are stable as long as electricity is supplied Based on regular flip-flops with gates Dynamic-RAM Data values require constant refresh Internal circuitry keeps capacitor charges Non-Volatile RAM Data remains valid even through power outages More expensive Limited lifetime; after 100000 to 1M writes, NV-RAM degrades

S-RAM Data A decoder selects which line of memory to access A R/W selector determines the type of access That line is then coupled to the data lines How do you build large memories? Address Decoder

Tristate Buffers A device that couples a logic line to a wire

Big Memories data enable Memory banks in parallel, with tri-state buffer and decoder to select which bank to couple The enable bit controls connection of data bits and clocking of internal flip-flops 2 12 addr

Summary We now have enough building blocks to build machines that can perform non-trivial computational tasks

A Calculator User enters the numbers to be added or subtracted using toggle switches User selects ADD or SUBTRACT Muxes feed A and B, or A and –B, to the 8-bit adder The 8-bit decoder for the hex display is straightforward (but not shown in detail) 8 … reg 8 adder led-dec 8 8 … reg mux 8 1 mux add/sub select doit

A Vote Counter 8 led-dec reg Data values flow from set of parallel registers (a register file) to the addition unit back into the register file 8 s1 .. mux 8 reg 1 clk s4 s4 s3 reg enc deco s2 s1