Electronics for Physicists

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Presentation transcript:

Electronics for Physicists Lecture 13 Combinatorial Logic

Electronics for physicists Combinatorial logic Combinatorial logic is the combination of many elementary logic gates to more general and complex logical modules. The output state (= result) depends only on the current input states. It does not depend on the history of the input states or on previous output states. The number of input and output states may vary wildly. input states output states November 2018 Electronics for physicists

Electronics for physicists Multiplexer (Mux) Multiplexer with 3 inputs (E1, E2, E3), control line S, and output A. Mux truth table Multiplexer with 2 AND-gates, 1 inverter, and 1 OR-gate November 2018 Electronics for physicists

Multiplexing data streams / serializer circuit with 2 inputs (E1, E2), clock and output (A) If you need to transmit the full information of all inputs (here E1 and E2), you must increase the output clock and data rate. Input frequency (40 MHz) 1 2 3 4 5 6 7 8 9 10 E1 E2 Output frequency (80 MHz) 12 34 56 78 90 A 01 00 11 November 2018 Electronics for physicists

Electronics for physicists Serializer November 2018 Electronics for physicists

Multiplexer as a “memory” 4 input lines set to “0” or “1” (here this values are kept constant) 2 address select lines a, b (was used as control line before!) 1 output line A November 2018 Electronics for physicists

Electronics for physicists Decoder truth table for E = 1 2 address lines a, b 4 output lines A0 to A3 1 enable line E. For E = “0”, all Ai are “0”. A decoder sets the selected output line to “1”. All other outputs are “0”. Purpose: chip select, row select, etc. November 2018 Electronics for physicists

Decoder Think of “a, b” as an address which 2-to-4 decoder with enable input Circuit diagram of a 2 – to – 4 decoder Think of “a, b” as an address which asserts a single corresponding address line Ai. November 2018 Electronics for physicists

Electronics for physicists Encoder An encoder is the reverse of a decoder. 4-to-2 Encoder The encoder output a, b corresponds to the input line set to “1”. Only one input line must be set to “1”. (A parity encoder relaxes this condition and selects the address with the highest input at to “1”.) November 2018 Electronics for physicists

Comparator A comparator checks if two input numbers are equal. 4-bit-comparator Truth table of 1-bit-comparator Algebraic expressions for 1-bit comparator. “a = b” = ab + ab “a > b” = a b “a < b” = a b This digital comparator is not to be confused with the op-amp comparator. November 2018 Electronics for physicists

Electronics for physicists Half adder The half adder is used for addition of binary numbers. s = sum c = carry For addition of numbers with more than 1 bit, need full adder. November 2018 Electronics for physicists

Adding arbitrarily long binary numbers Full adder Full adder Half adder LSB requires one half adder. For all other bits one additional full adder is needed. November 2018 Electronics for physicists

Electronics for physicists Full adder Full adder considers carry from previous stage. Half adder Half adder November 2018 Electronics for physicists