Electronics and DAQ Summary M. V. Purohit for Jing Wei Zhao, Zepu Mao, Huayi Sheng, Ping Ping Zhao, Shudi Gu, Yong Zhao Zhou et al.

Vertex Chamber This device is small and will be considered later – after the workshop.

MDC: Choice of Design Schemes Based on《Q to T converter + HPTDC》 Wire signal trigger Online VMEbus Q to T based mainamp Cern HPTDC based TDC Preamp. Calibration

MDC Scheme 2: Based on FADC and HPTDC. Preamp Wire Signal Mainamp Vth Trigger VMEbus timing Clock online Preamp Wire Signal dE/dx Vth Q measurement T Calibration Mainamp

MDC Issues Decision needed on Scheme 1 vs 2 Rests partly on available budget per channel Many noise issues: Reflection from ends of cables Channels closer to beam: no room for preamps on end-plates Cross-talk; Low noise supplies

Block Diagram of the TOF electronics L-threshold H_threshold Start 10ns L0 trigger From Online To Trigger Pre-amp Splitter Stop PMT Signal Driver HL Calibration LL Delay From L1 Trigger ADC Read-out TAC + FADC

Barrel electromagnetic Calorimeter Electronics System block diagram Preamplifiers Trigger Post amplifier V M E L1 Trigger C Trigger CL1 CR (RC)2 ∑ calibration Fan - out Charge measurement controller Σ B G O

EMC issue Major issue is noise reduction Cost is not a serious problem here

Muon Chambers Number of channels needs to be determined from physics considerations

DAQ BESIII’s sub-detectors are: Electronics will consist of five Vertex Chamber Main Drift Chamber TOF plus CCT Counter Electromagnetic Calorimeter MUON Identifier Electronics will consist of five sub-systems correspondingly. Total channel amount is about 50K~77K.

DAQ Schedule Software people exist. It is assumed that sufficient number of students will be found as necessary. Testing of DAQ subsystems must be possible before completion of FEE subsystems. Will help with specifications. This must include diagnostics.

Schematic of BES III Trigger VC DISC Hit Count L0 trigger Logic FEE L0P TOF DISC Hit/Seg Count Global Trigger Logic MDC DISC Track Seg. Finder Track Finder DAQ EMC BTE Sum Tile Sum Tile Processor Total Ener Sum L1P MU DISC Mu track CLOCK RF TTC 2.4 s

Trigger Issue Can L0 be used for timing instead of L1? Should segmentation of of cells match MDC? Might make life simpler. Interface personnel need to be designated.

System-wide issues Manpower: perhaps sufficient, but experienced people (engineers!) needed. Visits from foreign experts? Detailed schedules need to be drawn up: 1.5 to 2 years estimate from most groups needs timelines. Interface with other groups. Fallback options.