NS9750 - Training Hardware.

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Presentation transcript:

NS9750 - Training Hardware

SPI-Boot

SPI-Boot Strapping option on pin reset_done Hardware configures SPI interface Hardware configures memory interface Hardware configures external SDRAM Configuration information is stored in a header starting at address zero in the SPI-EEPROM ARM9 Wake-Up upon completion New feature for the NET+ARM family

SPI-Boot Limitations Supports SPI-EEPROM devices from 2Kb up to 32Mb Supports only clock mode (0,0) SPI-EEPROM devices Supported only on SPI port A

SPI-EEPROM Boot System

SPI-EEPROM Read Access