Variants of Turing Machines The Chinese University of Hong Kong Fall 2011 CSCI 3130: Formal languages and automata theory Variants of Turing Machines Andrej Bogdanov http://www.cse.cuhk.edu.hk/~andrejb/csc3130

The Church-Turing Thesis All arguments [for the CT Thesis] which can be given are bound to be, fundamentally, appeals to intuition, and for this reason rather unsatisfactory mathematically. The arguments which I shall use are of three kinds: 1. A direct appeal to intuition 2. A proof of the equivalence of two definitions (In case the new definition has greater intuitive appeal) 3. Giving examples of large classes of numbers [languages] which are computable. 1936: “On Computable Numbers, with an Application to the Entscheidungsproblem” Section 9. The extent of the computable numbers

The multitape Turing Machine control … tape 1 1 … 1 tape 2 … 1 tape 3 The transition may depend on the contents of all the cells Different tape heads can be moved independently

The multitape Turing Machine q7 0/1R ☐/1R 0/0L … 1 … 1 … 1 q3 … 1 Multiple tapes are convenient, e.g. one can serve as temporary storage

How to argue equivalence Multitape Turing Machines are equivalent to single-tape Turing Machines easy single tape multiple tapes describe a simulation

The multitape Turing Machine Multitape Turing Machines are equivalent to single-tape Turing Machines M … 1 G = {0, 1, ☐} S … 1 #  G’ = {0, 1, ☐, 0, 1, ☐, #}

Simulating a multitape TM We show how to simulate a multitape TM on an single tape TM To be specific, let’s do a 3-tape TM … x1 x2 xa xi y1 y2 yb yj z1 zc zk #x1x2...xa...xi#y1y2...yb...yj#z1z2...zc...zk#  Single-tape TM Multitape TM

Simulating a multitape TM Single-tape TM: Initialization w1w2...wn #w1w2...wn#☐#☐#  … 1 … 1 #  S: On input w1...wn: Replace tape contents by #w1w2...wn#☐#☐#  1. Remember that M is in state q0

Simulating a multitape TM Single-tape TM: Simulating Multitape TM moves Suppose Multitape TM wants to move like this: … 1 … 1 q3 0/1R ☐/1R 0/0L q7 We simulate move on single-tape TM like this: 1 #  1 # 

Simulating a multitape TM On input w1...wn: Replace tape contents by #w1w2...wn#☐#☐#  1. Remember (in state) that M is in state q0 2. To simulate a step of M: Make a pass over tape to find x, y, z  #x1x2...x...xi#y1y2...y...yj#z1z2...z...zk#  qi x/x’A y/y’B z/z’C qj If M is in state qi and has transition update state / tape accordingly. 3. If M reaches accept (reject) state, accept (reject).

Doing simulations To simulate a model M by another model N: 1. Say how the state and storage of N is used to represent the state and storage of M 2. Say what should be initially done to convert the input of N (if anything) 3. Say how each transition of M can be implemented by a sequence of transitions of N

What does a computer look like? CPU instruction memory 0000 PC arithmetic logical unit data memory 1010 0100 0000 registers R0 R1 R2 R3

What does a computer look like? CPU instruction memory PC 0000 load 0001 0001 write R3 0010 store R5 0011 add R5 0100 jpos 0011 ... 0000 arithmetic logical unit R0 0100 R1 1010 data memory registers R2 0000 0000 0001 0010 0011 0100 R3 0000 0110 0110 0110 0110 0110

Instruction set load x Put the value x into R0 load Rk Copy the value of Rk into R0 store Rk Copy the value of R0 into Rk read Rk Copy the value at memory location Rk into R0 write Rk Copy the value of R0 into memory location Rk add Rk Add R0 and Rk, and put result in R0 jump n Set PC to n jzero n Set PC to n, if R0 is zero jpos n Set PC to n, if R0 is positive

Random access machines instruction meaning program counter PC 1 2 3 4 5 load -7 R0 := -7 write R2 M[R2] := R0 store R1 R1 := R0 add R1 R0 := R0 + R5 jzero 3 if R0 = 0 then PC := 3 accept registers R0 R1 R2 … M 2 1 2 2 memory 1 2 3 4 It has registers that can store integer values, a program counter, and a random-access memory

Random access machines instruction meaning PC 1 2 3 1 2 3 4 5 load 7 R0 := 7 write R2 M[R2] := R0 store R1 R1 := R0 add R1 R0 := R0 + R1 jzero 3 if R0 = 0 then PC := 3 accept 4 5 R0 7 14 R1 7 R2 … M -7 1 2 3 4 The instructions are indexed by the program counter Initially, the input is in the first k memory cells, all registers and PC are set to 0

Random access machines Random access machines are equivalent to Turing Machines Simulating a Turing Machine on a RAM: M … 2 1 head tape blank PC 2 R0 1 M … G = {0, 1, 2, ..., k}

Simulating a TM on a RAM program M … q0 1/2R q1 1 2 3 6 7 8 9 10 1 2 3 6 7 8 9 10 store R1 handle for state q0 store R1 handle for state q1 … accept handle for state qacc 30 200 store R1 save head position read R1 read tape contents x add -1 jzero 6 if x = 1 goto line 6 load 2 new value of cell write R1 write in memory load R1 recall head position add 1 move head to right jump 30 go to state q1 … 1 2 1 PC R0 1 M 2 R1

Simulating a TM on a RAM program M … (head) … (tape) q0 1/2R q1 1 2 3 1 2 3 6 7 8 9 10 store R1 handle for state q0 store R1 handle for state q1 … 30 store R1 save head position read R1 read tape contents x add -1 jzero 6 if x = 1 goto line 6 load 2 new value of cell write R1 write in memory load R1 recall head position add 1 move head to right jump 30 go to state q1 … 1 2 1 2 3 2 1 (head) R0 2 2 … R1 M 1 2 1 2 (tape)

Simulating a RAM on a Turing Machine The configuration of a RAM consists of Program counter Contents of registers Indices and contents of all nonempty memory cells PC 14 configuration = (14, 3, 17, 5, (0, 2), (2, 1), (3, 2)) R0 3 R1 17 R2 5 … M 2 1 2 1 2 3 4

Simulating a RAM on a 2-tape TM The TM has a simulation tape and a scratch tape The simulation tape stores RAM configuration The TM has a set of states corresponding to each program instruction of the RAM The TM tape is updates according to RAM instruction M (14,3,17,5,(0,2),(2,1),(3,2))

Simulating a RAM on a 2-tape TM Initialization TM input: 122 RAM initial state: PC R0 ... M 1 2 2 S: On input w1...wn: 1. Replace tape contents by (0, 0, 0, ..., 0, (0, w1), (1, w2), ..., (n-1, wn))

Simulating a RAM on a 2-tape TM Example: load R1 c (14,3,17,5,(0,2),(2,1),(3,2)) 1. Copy R1 to scratch tape 17 s (14,1,17,5,(0,2),(2,1),(3,2)) 17 c s 2. Write R1 to conf tape (14,1,17,5,(0,2),(2,1),(3,2) ) c (14,1 ,17,5,(0,2),(2,1),(3,2)) . Make more space as needed (14,17,17,5,(0,2),(2,1),(3,2)) c 3. Erase scratch tape 4. Update PC (15,17,17,5,(0,2),(2,1),(3,2)) c

Simulating a RAM on a 2-tape TM On input w1...wn: 1. Replace tape contents by (0, 0, 0, ..., 0, (0, w1), (1, w2), ..., (n-1, wn)) 2. Simulate instruction in RAM program by a sequence of TM transitions See notes for details. 3. If RAM instruction is accept, go to accept state. If RAM instruction is reject, go to reject state.