CS4100: 計算機結構 Course Outline 國立清華大學資訊工程學系 九十六 年度第一學期 Adapted from Prof. D. Patterson’s class notes Copyright 1998, 2000 UCB Adapted from Prof.金仲達’s class notes

為什麼電腦不用十進位 而用二進位？

二進制只有兩種狀態 對、錯 本土化、非本土化 陰、陽 開、關 正、反 勝、負 真、偽 Outline-3

如何做出電子開關? 電 晶 體 “gate” as the switch Outline-4

A Working Transistor (1/6) Transistors consist of three terminals; the source, the gate, and the drain: Outline-5

A Working Transistor (2/6) In the n-type transistor, both the source and the drain are negatively-charged and sit on a positively-charged well of p-silicon. Outline-6

A Working Transistor (3/6) When positive voltage is applied to the gate, electrons in the p-silicon are attracted to the area under the gate forming an electron channel between the source and the drain. Outline-7

A Working Transistor (4/6) When positive voltage is applied to the drain, the electrons are pulled from the source to the drain. In this state the transistor is on. 開 Outline-8

A Working Transistor (5/6) If the voltage at the gate is removed, electrons are not attracted to the area between the source and drain. The pathway is broken and the transistor is turned off. 關 Outline-9

A Working Transistor (6/6) There are two major types of MOSes (switches), which operates in different conditions NMOS: g=1, switch on; g=0 switch off PMOS: g=1, switch off; g=0 switch on Outline-10

相關電壓電流特性 及電路分析等知識 我們是在＿＿＿課中介紹的 答：「電子電路學」「超大型積體電路設計」 Outline-11

有了開關就可以做邏輯閘 CMOS NAND: Outline-12

有了邏輯閘就可做邏輯電路 加法器： A B CI Cout S 1 Outline-13

也可以做記憶元件 可以儲存一個bit的元件 (如: Latch)： clock' S' Q' Q R' R S Outline-14

這部份的學問叫＿＿＿＿ 答：「數位邏輯設計」 Outline-15

於是電腦的主要部份都可以做了 暫存器 記憶體 控制器 控制信號 ALU N Z clock IR PC Outline-16

Basic Organization of Any Computer Keyboard, Mouse Display, Printer Disk (where programs, data live when not running) Computer Processor (active) Memory (passive) (where programs, data live when running) Devices Input That is, any computer, no matter how primitive or advance, can be divided into five parts: 1. The input devices bring the data from the outside world into the computer. 2. These data are kept in the computer’s memory until ... 3. The datapath request and process them. 4. The operation of the datapath is controlled by the computer’s controller. All the work done by the computer will NOT do us any good unless we can get the data back to the outside world. 5. Getting the data back to the outside world is the job of the output devices. The most COMMON way to connect these 5 components together is to use a network of busses. Control (“brain”) Datapath (“brawn”) Output Outline-17

Computer Organization Capabilities and performance characteristics of principal functional units, e.g., registers, ALU, shifters, ... Ways in which these components are interconnected (structure) Information flows between components (data, datapath) Logic and means by which such information flow is controlled Register Transfer Level (RTL) description Deeper view. Design state of art organization in 1990. This is only the computer organization. What is computer architecture ? Outline-18

What is Computer Architecture? Computer Architecture = Instruction Set Architecture + Machine Organization I/O system Processor Compiler Operating System (MS Windows) Application (IE) Digital Design Circuit Design Datapath & Control Transistors Memory Hardware Software Assembler Instruction Set Architecture Machine Organization Outline-19

Instruction Set as a Critical Interface Coordination of many levels of abstraction software instruction set hardware Does it have to be hardware? Outline-20

Another Perspective lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) High Level Language Program temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; Compiler lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) Assembly Language Program ISA Assembler Machine Language Program 0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 Machine Interpretation Control Signal Specification ALUOP[0:3] <= InstReg[9:11] & MASK ° Outline-21

Instruction Set Architecture (ISA) “... the attributes of a [computing] system as seen by the programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls, the logic design, and the physical implementation.” — Amdahl, Blaaw, and Brooks, 1964 Organization of Programmable Storage Data Types and Data Structures: Encodings and Representations Instruction Set Instruction Formats Modes of Addressing and Accessing Data Items and Instructions Exceptional Conditions SOFTWARE Outline-22

MIPS R3000 ISA Instruction categories: Load/Store Computational Registers Instruction categories: Load/Store Computational Jump and Branch Floating Point coprocessor Memory Management Special R0 - R31 PC HI LO 3 Instruction Formats: all 32 bits wide OP rs rt rd sa funct OP rs rt immediate OP jump target Outline-23

ISA Examples Digital Alpha (v1, v3) 1992-97 HP PA-RISC (v1.1, v2.0) 1986-96 Sun Sparc (v8, v9) 1987-95 SGI MIPS (MIPS I, II, III, IV, V) 1986-96 Intel (8086,80286,80386, 1978- 80486,Pentium, MMX, SIMD, IA-64, ...) Outline-24

Why Do Computer Architecture? RAPID CHANGES It is exciting! It has never been more exciting! It impacts every other aspect of electrical engineering and computer science Outline-25

Course Administration 授課老師: 黃婷婷 辦公室: 資電442 電話: 31310 email: tingting@cs.nthu.edu.tw 助教: 陳世梁劉哲宇 辦公室: 資電227,228 電話: 33572, 33573 email: chensl@cs.nthu.edu.tw, g9562529@oz.nthu.edu.tw 上課時間: CS4100-02: 星期二10:10-12:00 星期四10:10-11:00 上課地點: 資電館 131室 課程網頁: http://www.cs.nthu.edu.tw/~tingting/cs4100.html Outline-26

Text Book 史丹福大學 RISC, RAID 校長 Computer Organization and Design: The Hardware/Software Interface, 3rd ed., David Patterson and John Hennessy, 2005 史丹福大學 校長 RISC, RAID Outline-27

Topics Covered Computer Organization and Design: The Hardware/Software Interface,3rd ed., D. Patterson and J. Hennessy, 2005 Topic Chapter Introduction 1 The Role of Performance 4 Instructions: Language of the Machine 2 Arithmetic for Computers 3 The Processor: Datapath and Control 5 Enhancing Performance with Pipelining 6 Exploiting Memory Hierarchy 7 Interfacing Processors and Peripherals 8 Outline-28

Prerequisite Prerequisite courses: Digital Logic design Electronics Outline-29

Expected Course Workload Learn MIPS instruction set Learn processor emulators and benchmarking 5-6 homework assignments (1 per 2 weeks) Each assignment is a mixture of design, calculation, programming, measurement, and discussion problems Assignments will be posted on the portal Independent of, but complement, examinations One mid-term and one final examination Grade breakdown Homework Assignments 20% Final Project 10% Midterm Exam 35% Final Exam 35% Outline-30

Course Problems Cannot make examinations No makeup examinations Cannot turn in homework on time No late homework is accepted What is cheating? Study together in groups is encouraged Work must be your own Outline-31