Recall Last Lecture The MOSFET has only one current, ID Operation of MOSFET NMOS and PMOS For NMOS, VGS > VTN VDS sat = VGS – VTN For PMOS VSG > |VTP| VSD sat = VSG + VTP

ID versus VDS (NMOS) or ID versus VSD (PMOS)

PMOS NMOS VTP is NEGATIVE VTN is POSITIVE VSG > |VTP| to turn on Triode/non-saturation region Saturation region VSDsat = VSG + VTP NMOS VTN is POSITIVE VGS > VTN to turn on Triode/non-saturation region Saturation region VDSsat = VGS - VTN

DC analysis of FET

MOSFET DC Circuit Analysis - NMOS The source terminal is at ground and common to both input and output portions of the circuit. The CC acts as an open circuit to dc but it allows the signal voltage to the gate of the MOSFET. In the DC equivalent circuit, the gate current into the transistor is zero, the voltage at the gate is given by a voltage divider principle: VG = VTH = R2 VDD R1 + R2

MOSFET DC Circuit Analysis - NMOS Calculate the value of VGS Assume the transistor is biased in the saturation region, the drain current: Use KVL at DS loop IDRD + VDS – VDD = 0 VDS = VDD - IDRD Calculate VDSsat = VGS - VTN Confirm your assumption: If VDS > VDS(sat) = VGS – VTN, then the transistor is biased in the saturation region. If VDS < VDS(sat), then the transistor is biased in the non-saturation region.

EXAMPLE: Assume the transistor is biased in the saturation region, the drain current: Use KVL at DS loop IDRD + VDS – VDD = 0 VDS = VDD – IDRD = 3 V Calculate the drain current and drain to source voltage of a common source circuit with an n-channel enhancement mode MOSFET. Assume that R1 = 30 k, R2 = 20 k, RD = 20 k, VDD = 5V, VTN = 1V and Kn = 0.1 mA/V2 Calculate the value of VGS Calculate VDSsat = VGS – VTN = 2 – 1 = 1V Confirm your assumption: VDS > VDSsat, our assumption that the transistor is in saturation region is correct

EXAMPLE The transistor has parameters VTN = 2V and Kn = 0.25mA/V2. Find ID and VDS VDD = 10V RD = 10k R1 = 280k R2 = 160k

Solution Calculate the value of VGS Assume the transistor is biased in the saturation region, the drain current: Use KVL at DS loop IDRD + VDS – VDD = 0 VDS = VDD – IDRD = 3.31 V Calculate the value of VGS Calculate VDSsat = VGS – VTN = 3.636 – 2 = 1.636 V Confirm your assumption: VDS > VDSsat, our assumption that the transistor is in saturation region is correct Answer: ID = 0.669 mA and VDS = 3.31 V KVL at GS loop: VGS – VTH + 0 = 0  VGS = VTH

MOSFET DC Circuit Analysis - PMOS Different notation: VSG and VSD Threshold Voltage = - VTP + - VSD ID VDD R1 R2 RD VSG

Calculate the drain current and source to drain voltage of a common source circuit with an p-channel enhancement mode MOSFET. Also find the power dissipation. Assume that, VTP = -1.1V and Kp = 0.3 mA/V2 50 k 7.5 k 5V Calculate the value of VSG VTH = 2.5 V Use KVL at SG loop: VSG + 0 +2.5 – 5 = 0 VSG = 5 – 2.5 = 2.5 V Assume the transistor is biased in the saturation region, the drain current: Use KVL at SD loop IDRD + VSD – VDD = 0 VSD = VDD – IDRD = 0.584 V Calculate VSDsat = VSG +VTP = 2.5 – 1.1 = 1.4 V Confirm your assumption: VSD < VSD sat , so our assumption that the transistor is in saturation region is incorrect

That means our transistor is in non-saturation mode: Go back to step 2 ID = 0.3 2 ( 1.4 ) (5 – IDRD) – (5 – IDRD)2 ID = 0.3 2.8 (5 – 7.5 ID) – (5 - 7.5 ID)2 ID = 0.3 14 – 21 ID – (25 – 75ID + 56.25 ID2) ID = 0.3 14 – 21 ID -25 +75 ID – 56.25 ID2 ID = 4.2 – 6.3 ID – 7.5 +22.5 ID – 16.875 ID2 16.875 ID2 – 15.2 ID + 3.3 = 0 ID = 0.536 mA ID = 0.365 mA

ID = 0.536 mA ID = 0.365 mA VSD = 5 – IDRD = 0.98 V VSD = 5 – IDRD = 2.26 V VSD sat = VSG + VTP = 2.5 – 1.1 = 1.4V 2.26V > 1.4V Bigger than VSD sat : saturation 0.98V < 1.4V Smaller than VSD sat : non saturation Answer: ID = 0.536 mA and VSD = 0.98V Power dissipation = ID x VSD = 0.525 mW

LOAD LINE, ID versus VDS Common source configuration i.e source is grounded. It is the linear equation of ID versus VDS Use KVL VDS = VDD – IDRD ID = -VDS + VDD RD RD

ID (mA) VDS (V) VGS VDS ID Q-POINTS y-intercept x-intercept

DC Analysis where source is NOT GROUNDED For the NMOS transistor in the circuit below, the parameters are VTN = 1V and Kn = 0.5 mA/V2.

Calculate the value of VGS KVL at GS loop: R D = 2 k S G 24 k + 5 V 1 V I 5 V Assume the transistor is biased in the saturation region, the drain current: Calculate the value of VGS KVL at GS loop: 0 + VGS+ 1(ID) -5 +1 = 0 VGS = 4 - ID 1 k ID = 6.646 mA VGS= -2. 646 V Replace in VGS equation in step 1 VGS = 4 - ID ID = 1.354 mA VGS = 2.646 V Why choose VGS = 2.646 V ? Because it is bigger than VTN

Calculate VDSsat = VGS – VTN = 2.646 – 1 = 1.646 V R D = 2 k S G 24 k + 5 V 1 V I 5 V Use KVL at DS loop Calculate VDSsat = VGS – VTN = 2.646 – 1 = 1.646 V Confirm your assumption: VDS > VDS sat , our assumption is correct IDRD + VDS + IDRS – 5 – 5 = 0 1.354 (2) + VDS + 1.354 – 10 = 0 VDS = 10 – 1.354 – 2.708 = 5.938 V 1 k

EXERCISE 1 The transistor parameters are VTN = 0.4 V, Kn = 3 mA/V2. The value of the current, ID = 0.35 mA Calculate value of VDS and VGS Calculate VDSsat . Is the transistor in saturation? ID Answers: Part (i) VDS = 1.1 V VGS = 0.742 V Part (ii) VDS sat = 0.342 V YES

EXERCISE 2 The transistor parameters are VTN = 0.4 V, Kn = 0.28 mA/V2. The circuit parameter is VDD = 3 V . The value of the current, ID = 0.09733 mA when the input voltage VI = 2.6 V. Calculate the value of VDS and the resistor RD VD From the data given in the question and based on the two formulas, we can conclude that we need to use the non-saturation formula to find out what is VDS

0.09733 = 0.28 2 (2.6 – 0.4)VDS – VDS2 0.3476 = 4.4 VDS – VDS2 VDS2 – 4.4 VDS + 0.3476 = 0 VDS = 0.08 V VDS = 4.32 V But VDSsat = VGS – VTN = 2.6 – 0.4 = 2.2 V So, since we have used the non-saturation formula, the correct value of VDS must be less than the VDSsat which is VDS = 0.08 V To calculate RD , KVL at DS loop IDRD + VDS – 3 = 0 (0.09733) (RD) + 0.08 – 3 = 0 RD = 2.92 / 0.09733 = 30 k