Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/ EE5342 – Semiconductor Device Modeling and Characterization Lecture 20 March 31, 2010 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/

Schedule Change Classes WILL be held on 4/5/10 4/7/10 Dr. Russell will be filling in The previously scheduled make-up classes will be cancelled 4/16/10 (Friday) 4/23/10 (Friday) Project 2 Test changed to W 4/28/10 L20 03/31/10

Inversion for p-Si Vgate>VTh>VFB Vgate> VFB EOx,x> 0 e- e- e- e- e- Depl Reg Acceptors Vsub = 0 L20 03/31/10

Inversion for p-Si Vgate>VTh>VFB Fig 10.5* L20 03/31/10

Approximation concept “Onset of Strong Inv” OSI = Onset of Strong Inversion occurs when ns = Na = ppo and VG = VTh Assume ns = 0 for VG < VTh Assume xdepl = xd,max for VG = VTh and it doesn’t increase for VG > VTh Cd,min = eSi/xd,max for VG > VTh Assume ns > 0 for VG > VTh L20 03/31/10

MOS Bands at OSI p-substr = n-channel Fig 10.9* L20 03/31/10

Equivalent circuit above OSI Depl depth given by the maximum depl = xd,max = [2eSi|2fp|/(qNa)]1/2 Depl cap, C’d,min = eSi/xd,max Oxide cap, C’Ox = eOx/xOx Net C is the series comb C’Ox C’d,min L20 03/31/10

MOS surface states** p- substr = n-channel

n-substr accumulation (p-channel) Fig 10.7a* L20 03/31/10

n-substrate depletion (p-channel) Fig 10.7b* L20 03/31/10

n-substrate inversion (p-channel) Fig 10.7* L20 03/31/10

Values for gate work function, fm

Values for fms with metal gate

Values for fms with silicon gate

Typical fms values Fig 10.15* fms (V) NB (cm-3) L20 03/31/10

Flat band with oxide charge (approx. scale) SiO2 p-Si +<--Vox-->- q(Vox) Ec,Ox q(ffp-cox) q(fm-cox) Ex Eg,ox~8eV EFm Ec EFi EFp q(VFB) Ev VFB= VG-VB, when Si bands are flat Ev L20 03/31/10

Flat-band parameters for n-channel (p-subst)

Flat-band parameters for p-channel (n-subst)

Inversion for p-Si Vgate>VTh>VFB Vgate> VFB EOx,x> 0 e- e- e- e- e- Depl Reg Acceptors Vsub = 0 L20 03/31/10

Approximation concept “Onset of Strong Inv” OSI = Onset of Strong Inversion occurs when ns = Na = ppo and VG = VTh Assume ns = 0 for VG < VTh Assume xdepl = xd,max for VG = VTh and it doesn’t increase for VG > VTh Cd,min = eSi/xd,max for VG > VTh Assume ns > 0 for VG > VTh L20 03/31/10

MOS Bands at OSI p-substr = n-channel Fig 10.9* 2q|fp| qfp xd,max L20 03/31/10

Computing the D.R. W and Q at O.S.I. Ex Emax x L20 03/31/10

Calculation of the threshold cond, VT

Equations for VT calculation

n-channel VT for VC = VB = 0 Fig 10.20* L20 03/31/10

Fully biased n-MOS capacitor VG Channel if VG > VT VS VD EOx,x> 0 n+ e- e- e- e- e- e- n+ p-substrate Vsub=VB Depl Reg Acceptors y L20 03/31/10 L

Fully biased MOS capacitor in inversion Channel VG>VT VS=VC VD=VC EOx,x> 0 n+ e- e- e- e- e- e- n+ p-substrate Vsub=VB Depl Reg Acceptors y L20 03/31/10 L

Flat band with oxide charge (approx. scale) SiO2 p-Si +<--Vox-->- q(Vox) Ec,Ox q(ffp-cox) q(fm-cox) Ex Eg,ox~8eV EFm Ec EFi EFp q(VFB) Ev VFB= VG-VB, when Si bands are flat Ev L20 03/31/10

Flat-band parameters for n-channel (p-subst)

MOS energy bands at Si surface for n-channel Fig 8.10** L20 03/31/10

Computing the D.R. W and Q at O.S.I. Ex Emax x L20 03/31/10

Q’d,max and xd,max for biased MOS capacitor Fig 8.11** |Q’d,max|/q (cm-2) xd,max (microns) L20 03/31/10

Fully biased n- channel VT calc

L20 03/31/10

Computing the threshold voltage

L20 03/31/10

n-channel VT for VC = VB = 0 Fig 10.20* L20 03/31/10

Flat-band parameters for p-channel (n-subst)

Fully biased p- channel VT calc

p-channel VT for VC = VB = 0 Fig 10.21* L20 03/31/10

Ion implantation L20 03/31/10

“Dotted box” approx L20 03/31/10

L20 03/31/10

Mobilities L20 03/31/10

Differential charges for low and high freq From Fig 10.27* L20 03/31/10

Ideal low-freq C-V relationship Fig 10.25* L20 03/31/10

Comparison of low and high freq C-V Fig 10.28* L20 03/31/10

Effect of Q’ss on the C-V relationship Fig 10.29* L20 03/31/10

n-channel enhancement MOSFET in ohmic region 0< VT< VG Channel VS = 0 0< VD< VDS,sat EOx,x> 0 n+ e-e- e- e- e- n+ Depl Reg p-substrate Acceptors VB < 0 L20 03/31/10

Conductance of inverted channel Q’n = - C’Ox(VGC-VT) n’s = C’Ox(VGC-VT)/q, (# inv elect/cm2) The conductivity sn = (n’s/t) q mn G = sn(Wt/L) = n’s q mn (W/L) = 1/R, so I = V/R = dV/dR, dR = dL/(n’sqmnW) L20 03/31/10

Basic I-V relation for MOS channel

I-V relation for n-MOS (ohmic reg) ID non-physical ID,sat saturated VDS,sat VDS L20 03/31/10

Universal drain characteristic ID VGS=VT+3V 9ID1 ohmic saturated, VDS>VGS-VT VGS=VT+2V 4ID1 VGS=VT+1V ID1 VDS L20 03/31/10

Characterizing the n-ch MOSFET VD ID D G S B VT VGS L20 03/31/10

Low field ohmic characteristics

MOSFET Device Structre Fig. 4-1, M&A* L20 03/31/10

4-7a (A&M) L20 03/31/10

Figure 4-7b (A&M) L20 03/31/10

Figure 4-8a (A&M) L20 03/31/10

Figure 4-8b (A&M) L20 03/31/10

Body effect data Fig 9.9** L20 03/31/10

References * Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986 L20 03/31/10