UCSB Dicing, Wire-Bonding and Board Assembly Event, location, date UCSB Dicing, Wire-Bonding and Board Assembly Arda Simsek University of California, Santa Barbara

What we want? Wafer preparation (dicing) Mount the wafer on PCB and wire-bond. Mount 15-20 SMT caps per chip. This will be done for two chips. ADDITIONAL INFORMATION: For each chip we need less than 50 microns margin to the chip edge Pad sizes to be wire-bonded are 50.2 um X 38.2 um Chip place size on PCB = 2mm X 2.1mm Diced chip-1 size will be 1.79mm X 1.86mm, then we will have bigger than 100 um space for ground down bondings Diced chip-2 size will be 1.77mm X 1.86mm, then we will have bigger than 100 um space for ground down bondings

Wafer Preparation for Chip-1 and Chip-2 Actual chip-1 size is 1.69 mm x 1.76 mm , chip-2 size is 1.67mm x 1.76mm. The chip-1 is at bottom left corner of a 5mm x 5mm die (to be exact at x=30um, y=250um) Targeted chip-1 size after dicing is 1.79 mm x 1.86 mm , chip-2 size is 1.77mm x 1.86mm. The chip margin will be less than 50 um from each side, so we need total 5 cuts. 1st cut at x=1.74 mm, 2nd cut at y=4 mm, 3rd cut at y=2.16 mm, 4th cut 2.05 mm, and 5th cut at y=0.21 mm. 3rd Cut 2nd Cut Chip-2 Chip-1 1st Cut 5th Cut 4th Cut

Wafer Preparation for Chip-1 and Chip-2 1st Cut Chip-1 is placed at (30um, 250um) Chip-2 is placed at (30um, 2200um) Chip-1 size is 1.69 mm x 1.76 mm , chip-2 size is 1.67mm x 1.76mm. Targeted Chip-1 size is 1.79 mm x 1.86 mm , chip-2 size is 1.77mm x 1.86mm. Total die size is 5 mm X 5 mm The chip margin will be less than 50 um from each side, so we need total 5 cuts. If we can achieve this with one cut instead of 3rd and 4th cuts that should be fine. 1st cut at x=1.74 mm, 2nd cut at y=4 mm, 3rd cut at y=2.16 mm, 4th cut 2.05 mm, and 5th cut at y=0.21 mm. 2nd Cut 3rd Cut 4th Cut 5th Cut

Wafer Preparation for Chip-1 and Chip-2 We have diced 2 chips previously, and example can be seen here: Diced Chip-1 Diced Chip-2 2nd Cut 4th Cut 3rd Cut Chip-2 Chip-1 1st Cut 5th Cut

CHIP-1 Rx Wire-bonding and Assembly

Chip-1 Wire-bonding Diagram: Receiver Chip top needs to be free from anything NO ENCAPSULATION We need to probe the left pads

Chip-1 Assembly: 6x3 kind caps and CMOS chip 1nF: GRM1555C1H102JA01D 10nF: GRM155R71H103KA88D 100nF: GRM155R71C104KA88D Chip CMOS Chip-1

Chip-1 Assembly Chip-1 will be placed middle in the following PCB (RX CARRIER 2018_10) and wire-bonded as shown in previous slide. 18 SMT caps will be placed Chip Placement Rx Label 1nF: GRM1555C1H102JA01D 10nF: GRM155R71H103KA88D 100nF: GRM155R71C104KA88D Chip Placement

CHIP-2 Tx Wire-bonding and Assembly

Chip-2 Wire-bonding Diagram: Transmitter Yellow: optional Free from anything NO ENCAPSULATION

Chip-2 Assembly: 8x3 kind caps and CMOS chip 1nF: GRM1555C1H102JA01D 10nF: GRM155R71H103KA88D 100nF: GRM155R71C104KA88D Chip CMOS Chip-2

Chip-2 Assembly Chip-2 will be placed middle in the following PCB (TX CARRIER 2018_10) and wire-bonded as shown in previous slide. 24 SMT caps will be placed Chip-2 Placement Tx Label 1nF: GRM1555C1H102JA01D 10nF: GRM155R71H103KA88D 100nF: GRM155R71C104KA88D Chip Placement