ECE 875: Electronic Devices Prof. Virginia Ayres Electrical & Computer Engineering Michigan State University ayresv@msu.edu

Lecture 28, 21 Mar 14 Chp 04: metal-insulator-semiconductor junction: GATES Q, E , V/y, WD Capacitances VM Ayres, ECE875, S14

Example 01 (will be a continuing problem): + VM Ayres, ECE875, S14

Q E VM Ayres, ECE875, S14

E (x) Q(x) = esE (x) Q (x) VM Ayres, ECE875, S14

Can easily find E (x) and Q(x) for known yp(x): Therefore: what yp(x) do we know: VM Ayres, ECE875, S14

Purpose of a channel in a transistor: binary logic: ON/OFF VM Ayres, ECE875, S14

ON to OFF: ON: Strong inversion Going OFF: intrinsic OFF: Strong accumulation Going OFF: Flatband VM Ayres, ECE875, S14

OFF to ON: ON: Strong inversion Going OFF: intrinsic OFF: Strong accumulation Going OFF: Flatband VM Ayres, ECE875, S14

Example: What are you trying to find? What changed from our=Fig 5 example?

Answer:

Same as in Lec 27: 2 nn0 nn0 3: @ ys for strong inversion 1 VM Ayres, ECE875, S14

Detail: n-channel Debye length LD: Picture is 2 out of 3: Missing the holes Diffusion is hard to stop: holes can diffuse 3D.

Detail: Realistic flatband (n-channel): Miracle (restrictive) Evac