CSL718 : Superscalar Processors Handling Data Dependencies 24th Jan, 2006 Anshul Kumar, CSE IITD
CDC6600 : score-boarding scheme Illustration 1 CDC6600 : score-boarding scheme Dispatch bound fetch FUs : INT, MUL1, MUL2, ADD/SUB, DIV 1 RS per FU 1 RF In order issue, dispatch order trivial, out of order execution Anshul Kumar, CSE IITD
Checking in dispatch bound fetch decoded instruction Reservation station check V bits of sources update Rd set V bit Rs1,Rs2,Rd reset V bit of Rd OC Rs1 Rs2 Rd Register File OC (opcode) Os1 Os2 (operand value) EU result, Rd Anshul Kumar, CSE IITD
Instruction status Functional Units RF INSTRUCTION ISSUE READ OP EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 No NAME BUSY OP Fi Fj Fk Qj Qk Rj Rk 1 INT 2 MUL1 Functional Units 3 MUL2 4 ADD 5 DIV F0 F2 F4 F6 F8 F10 F12 F14 RF FU No
Instruction status Functional Units RF INSTRUCTION ISSUE READ OP EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 No NAME BUSY OP Fi Fj Fk Qj Qk Rj Rk 1 INT Y LF 2 MUL1 Y MUL Functional Units 3 MUL2 N 4 ADD Y SUB 5 DIV Y DIV F0 F2 F4 F6 F8 F10 F12 F14 RF FU No
Instruction status Functional Units RF INSTRUCTION ISSUE READ OP EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 No NAME BUSY OP Fi Fj Fk Qj Qk Rj Rk 1 INT Y LF F2 R3 2 MUL1 Y MUL F0 F2 F4 Functional Units 3 MUL2 N 4 ADD Y SUB F8 F6 F2 5 DIV Y DIV F10 F0 F6 F0 F2 F4 F6 F8 F10 F12 F14 RF FU No
Instruction status Functional Units RF INSTRUCTION ISSUE READ OP EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 No NAME BUSY OP Fi Fj Fk Qj Qk Rj Rk 1 INT Y LF F2 R3 Y Y 2 MUL1 Y MUL F0 F2 F4 1 N Y Functional Units 3 MUL2 N 4 ADD Y SUB F8 F6 F2 1 Y N 5 DIV Y DIV F10 F0 F6 2 N Y F0 F2 F4 F6 F8 F10 F12 F14 RF FU No 2 1 4 5
Instruction status Functional Units RF INSTRUCTION ISSUE READ OP EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 No NAME BUSY OP Fi Fj Fk Qj Qk Rj Rk 1 INT Y LF F2 R3 N N 2 MUL1 Y MUL F0 F2 F4 1 N Y Functional Units 3 MUL2 N 4 ADD Y SUB F8 F6 F2 1 Y N 5 DIV Y DIV F10 F0 F6 2 N Y F0 F2 F4 F6 F8 F10 F12 F14 RF FU No 2 1 4 5
Instruction status Functional Units RF INSTRUCTION ISSUE READ OP EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 No NAME BUSY OP Fi Fj Fk Qj Qk Rj Rk 1 INT N 2 MUL1 Y MUL F0 F2 F4 Y Y Functional Units 3 MUL2 N 4 ADD Y SUB F8 F6 F2 Y Y 5 DIV Y DIV F10 F0 F6 2 N Y F0 F2 F4 F6 F8 F10 F12 F14 RF FU No 2 4 5
Instruction status Functional Units RF INSTRUCTION ISSUE READ OP EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 No NAME BUSY OP Fi Fj Fk Qj Qk Rj Rk 1 INT N 2 MUL1 Y MUL F0 F2 F4 N N Functional Units 3 MUL2 N 4 ADD N 5 DIV Y DIV F10 F0 F6 2 N Y F0 F2 F4 F6 F8 F10 F12 F14 RF FU No 2 5
Instruction status Functional Units RF INSTRUCTION ISSUE READ OP EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 No NAME BUSY OP Fi Fj Fk Qj Qk Rj Rk 1 INT N 2 MUL1 Y MUL F0 F2 F4 N N Functional Units 3 MUL2 N 4 ADD Y ADD F6 F8 F2 Y Y 5 DIV Y DIV F10 F0 F6 2 N Y F0 F2 F4 F6 F8 F10 F12 F14 RF FU No 2 4 5
Instruction status Functional Units RF INSTRUCTION ISSUE READ OP EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 No NAME BUSY OP Fi Fj Fk Qj Qk Rj Rk 1 INT N 2 MUL1 Y MUL F0 F2 F4 N N Functional Units 3 MUL2 N 4 ADD Y ADD F6 F8 F2 N N 5 DIV Y DIV F10 F0 F6 2 N Y F0 F2 F4 F6 F8 F10 F12 F14 RF FU No 2 4 5
Instruction status Functional Units RF INSTRUCTION ISSUE READ OP EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 No NAME BUSY OP Fi Fj Fk Qj Qk Rj Rk 1 INT N 2 MUL1 Y MUL F0 F2 F4 N N Functional Units 3 MUL2 N 4 ADD Y ADD F6 F8 F2 N N 5 DIV Y DIV F10 F0 F6 2 N Y F0 F2 F4 F6 F8 F10 F12 F14 RF FU No 2 4 5
Instruction status Functional Units RF INSTRUCTION ISSUE READ OP EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 No NAME BUSY OP Fi Fj Fk Qj Qk Rj Rk 1 INT N 2 MUL1 N Functional Units 3 MUL2 N 4 ADD Y ADD F6 F8 F2 N N 5 DIV Y DIV F10 F0 F6 Y Y F0 F2 F4 F6 F8 F10 F12 F14 RF FU No 4 5
Instruction status Functional Units RF INSTRUCTION ISSUE READ OP EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 No NAME BUSY OP Fi Fj Fk Qj Qk Rj Rk 1 INT N 2 MUL1 N Functional Units 3 MUL2 N 4 ADD Y ADD F6 F8 F2 N N 5 DIV Y DIV F10 F0 F6 N N F0 F2 F4 F6 F8 F10 F12 F14 RF FU No 4 5
Instruction status Functional Units RF INSTRUCTION ISSUE READ OP EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 No NAME BUSY OP Fi Fj Fk Qj Qk Rj Rk 1 INT N 2 MUL1 N Functional Units 3 MUL2 N 4 ADD N 5 DIV Y DIV F10 F0 F6 N N F0 F2 F4 F6 F8 F10 F12 F14 RF FU No 5
IBM 360/91 - Tomasulo’s scheme Illustration 2 IBM 360/91 - Tomasulo’s scheme Issue bound fetch FUs : LOAD, STORE, 3 x ADD/SUB, 2 x MUL/DIV Group RS’s with 1 slot per FU 1 RF In order issue, out of order execution Anshul Kumar, CSE IITD
Checking in issue bound fetch decoded instruction Rs1,Rs2,Rd reset V bit of Rd update Rd, set V bit Register File Os1 Os2 (operand value) Reservation station check Vs1, Vs2 OC, Os1, Os2, Rd OC Os1/Is1 Vs1 Os2/Is2 Vs2 Rd EU associative update of Is1, Is2 with Rd, set Vs bits result, Rd Anshul Kumar, CSE IITD
Instruction status Functional Units RF INSTRUCTION ISSUE EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 NAME BUSY OP Vj Vk Qj Qk ADD1 ADD2 Functional Units ADD3 MUL1 MUL2 F0 F2 F4 F6 F8 F10 F12 F14 RF Qi
Instruction status Functional Units RF INSTRUCTION ISSUE EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 NAME BUSY OP Vj Vk Qj Qk ADD1 Y SUB ADD2 Y ADD Functional Units ADD3 N MUL1 Y MUL MUL2 Y DIV F0 F2 F4 F6 F8 F10 F12 F14 RF Qi
Instruction status Functional Units RF INSTRUCTION ISSUE EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 NAME BUSY OP Vj Vk Qj Qk ADD1 Y SUB (LD1) LD2 ADD2 Y ADD ADD1 LD2 Functional Units ADD3 N MUL1 Y MUL (F4) LD2 MUL2 Y DIV (LD1) MUL1 F0 F2 F4 F6 F8 F10 F12 F14 RF Qi MUL1 LD2 ADD2 ADD1 MUL2
Instruction status Functional Units RF INSTRUCTION ISSUE EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 NAME BUSY OP Vj Vk Qj Qk ADD1 Y SUB (LD1) (LD2) ADD2 Y ADD (LD2) ADD1 Functional Units ADD3 N MUL1 Y MUL (LD2) (F4) MUL2 Y DIV (LD1) MUL1 F0 F2 F4 F6 F8 F10 F12 F14 RF Qi MUL1 ADD2 ADD1 MUL2
Instruction status Functional Units RF INSTRUCTION ISSUE EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 NAME BUSY OP Vj Vk Qj Qk ADD1 N ADD2 Y ADD (ADD1) (LD2) Functional Units ADD3 N MUL1 Y MUL (LD2) (F4) MUL2 Y DIV (LD1) MUL1 F0 F2 F4 F6 F8 F10 F12 F14 RF Qi MUL1 ADD2 MUL2
Instruction status Functional Units RF INSTRUCTION ISSUE EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 NAME BUSY OP Vj Vk Qj Qk ADD1 N ADD2 Y ADD (ADD1) (LD2) Functional Units ADD3 N MUL1 Y MUL (LD2) (F4) MUL2 Y DIV (LD1) MUL1 F0 F2 F4 F6 F8 F10 F12 F14 RF Qi MUL1 ADD2 MUL2
Instruction status Functional Units RF INSTRUCTION ISSUE EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 NAME BUSY OP Vj Vk Qj Qk ADD1 N ADD2 N Functional Units ADD3 N MUL1 Y MUL (LD2) (F4) MUL2 Y DIV (LD1) MUL1 F0 F2 F4 F6 F8 F10 F12 F14 RF Qi MUL1 MUL2
Instruction status Functional Units RF INSTRUCTION ISSUE EX COMPL WRITERES LF F6, 34(R2) LF F2, 45(R3) Instruction status MUL F0,F2,F4 SUB F8,F6,F2 DIVF10,F0,F6 ADD F6,F8,F2 NAME BUSY OP Vj Vk Qj Qk ADD1 N ADD2 N Functional Units ADD3 N MUL1 N MUL2 Y DIV (MUL1) (LD1) F0 F2 F4 F6 F8 F10 F12 F14 RF Qi MUL2
End of Illustration Ref: Hennesy & Patterson’s Book [Ch. 4] Anshul Kumar, CSE IITD
RAW, WAR and WAW (in Static Pipeline) IF D RF EX WB RAW IF D RF EX WB IF D RF EX WB WAR IF D RF EX WB IF D RF EX EX EX WB WAW IF D RF EX WB Anshul Kumar, CSE IITD
RAW, WAR and WAW (in Superscalar) write IF IS DP EX WB RAW read IF IS DP EX WB WAW WAR write IF IS DP EX WB Anshul Kumar, CSE IITD
Implementation using scoreboard bit write IF IS DP EX WB RAW read IF IS DP EX WB WAW WAR write IF IS DP EX WB b 0 Anshul Kumar, CSE IITD
CDC 6600 like Implementation b 0 b 1 write IF IS DP EX WB RAW read IF IS DP EX WB WAW WAR write IF IS DP EX WB b 0 Anshul Kumar, CSE IITD
IBM 360 like Implementation write IF IS DP EX WB RAW read IF IS DP EX WB WAW WAR write IF IS DP EX WB b 0 Anshul Kumar, CSE IITD
Use of Renaming write read write IF IS DP EX WB RAW IF IS DP EX WB WAW WAR write IF IS DP EX WB Anshul Kumar, CSE IITD