Applications in Quantum Computing

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Presentation transcript:

Applications in Quantum Computing Manipulation of Nanostructures on Silicon (111) 7x7 Surface for Applications in Quantum Computing Michael Chiena,b, Tomoya Araib, Shing-Chiang Huangb, and Kohei M. Itohb a NanoJapan Program, Rice University & Department of Physics, University of Pennsylvania b Department of Applied Physics and Physio-Informatics, Keio University, Yokohama, Japan 10 hours DC Annealing ~800°C Solid silicon is evaporated and deposited onto substrate in ultra-high vacuum STM image* of result of 0.84L Si deposition @ Tsub= 400°C Current in kink-up direction causes electromigration of atoms that straightens kinks in the steps 2nm STM image* of straightened step edge after DC annealing Fine polishing at 1° tilt in (1 1 1) direction and 3° tilt in azimuthal direction produces kinked steps on silicon surface Methods & Results Silicon (111) 7x7 Substrate Preparation Mechanical & Chemical Polishing Direct Current (DC) Annealing Deposition of natSi Molecular Beam Epitaxy Growth STM Profile Wide range STM image of silicon surface after polishing Results (cont’d) Scanning Tunneling Spectroscopy (STS) STS spectra* of deposited atoms reasonably matches that of original Si (111) 7x7 adatoms Purpose The All-Silicon Quantum Computer1 Silicon-29 has nuclear spin which serve as qubits Silicon-28 substrate has no nuclear spin Phosphorous-31 used for initialization and readout of spin after quantum computations NiFe Magnet generates a steep magnetic field gradient needed to maintain spins Advantages of All-Silicon System Long decoherence time for nuclear spin of 29Si Scalability of solid state hardware Existing technologies for silicon fabrication 28 29 P Nuclear-spin-free 28Si substrate ** 50nm 3° Scanning Tunneling Microscope 29Si Nuclear spin of 29Si as qubits Superposition Conclusions Initial Steps For Realization of Quantum Computer An effective substrate for growth of single atom wide Silicon atom row and other nanostructures can be created by polishing and DC annealing of Silicon (111) 7x7 to produce a regularly stepped vicinal surface. Variations in polishing and annealing allow for growth of different structures, such as the single atom wide Silicon atom row or regularly spaced atoms. Identity of deposited silicon can be confirmed by STS. Future Work Confirmation of deposited Phosphorous by STS. Finer control of deposition (vary temperature, etc.). DC ** U F 2.5nm Adatoms Corner holes Side View Background Silicon (111) 7x7 Surface Structure2 Regular pattern and rigid unit-cell on surface allows for mechanical manipulation Reduction of dangling bonds from 49 to 19 per unit cell allows for finer control of deposition onto the substrate MBE Growth @ Tsub= 400°C ~10 -11 torr STM Image* Rigid Dimer Edges References 1. T.S. Ladd, J.R. Goldman, F. Yamaguchi, Y. Yamamoto, E. Abe, and K.M.Itoh, Phys. Rev. Lett. 89 017901 (2002). 2. I.-S. Hwang et al. Phys. Chem. 62 1655 (2001) ** Research conducted in the Itoh Laboratory of Keio University as a participant in the NanoJapan Program 2009, sponsored by Rice University and the NSF-PIRE grant. Sincere appreciation is due to Prof. Junichiro Kono, Dr. Cheryl Matherly, Prof. Christopher Stanton, Sarah Phillips, and Keiko Packard for making the NanoJapan Program possible, and to Tomoya Arai for his tireless and careful guidance, both in and out of the lab. Thanks to Omicron also, for making highly reliable STMs. *Some STM & STS images courtesy of Tomoya Arai. **Some diagrams courtesy of Takeharu Sekiguchi. This work was supported by the National Science Foundation under Grant No. OISE‐0530220. http://nanojapan.rice.edu