Zero Skew Clock tree Implementation

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Presentation transcript:

Zero Skew Clock tree Implementation

Skew & Wirelength What is skew About zero skew Definition : the max difference in arrival times of receivers. About zero skew

Skew & Wirelength About wirelength Problem: zero skew & minimize the wirelength

Clock tree A binary tree Root = source Leaves = sinks clock entry A B D E F G H

Problem: zero skew & minimize the wirelength Topology generation DME algorithm point set topology Clock tree output

DME algorithm DME ( deferred-merge embedding ) Given any topology (tree)  exact zero skew Two Phase Bottom-Up (build tree of merging segments) Top-Down (embedding of nodes)

DME algorithm Example : Bottom-Up phase Top-Down phase D E C F A B C D 4.5 C 5 F A B C D E F G H 8.5 8 12 G 3 A H 3.5 B

Manhattan & X architecture

Topology generation How to match? Good topology  smaller wirelength. Some method of topology generation BB (Balanced Bipartition) MMM (Method of Means and Medians) NS (Nearest-neighbor Selection)

Topology generation For k sinks, it have different trees. Complexity: Good method  save time

Topology generation About MMM

Topology generation About my method : complexity:

Topology generation Still have bugs Under Elmore Delay Model

Result: Manhattan, My method Sample: r1.pin 267 sinks

Result: Manhattan, MMM Sample: r1.pin 267 sinks

Result: X ,my method Sample: r1.pin 267 sinks

Result: X, MMM Sample: r1.pin 267 sinks

R1.pin Result wirelength My method, Manhattan 1.59299e+006 My method, X 1.38574e+006 MMM, Manhattan 1.51683e+006 MMM, X 1.35145e+006 % My method v.s. MMM, Manhattan -5.02% X -2.53% MMM, Manhattan 13.01% MMM, X 10.9%

Future Work wirelength

Future Work Matching on X

Thank You