Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs) Submission Title: [Robust Ranging Algorithm for UWB radio] Date Submitted: [19 July, 2005] Source: [Cheolhyo Lee (1), Jae Young Kim (1), Eun Chang Choi (1), Chong Hyun Lee (2)] Company [(1) Electronics and Telecommunications Research Institute (ETRI) (2) Seokyeong University] Address [(1) 161 Gajeong-dong, Yuseong-gu, Daejeon, Republic of Korea (2) 16-1 Jungneung-Dong, Sungbuk-Ku, Seoul, Republic of Korea] Voice:[(1) +82 42 860 5577, (2) +82 2 940 7472], FAX: [(1) +82 42 860 5218 (2) +82 2 919 0345] E-Mail: [(1) clee7@etri.re.kr, (2) chonglee@skuniv.ac.kr] Abstract: [The robust ranging algorithm is proposed for the alternative PHY for 802.15.4a] Purpose: [This submission is in response to the committee’s request to submit the proposal enabled by an alternate 802.15 TG4a PHY] Notice: This document has been prepared to assist the IEEE P802.15. It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor acknowledges and accepts that this contribution becomes the property of IEEE and may be made publicly available by P802.15.
Electronics and Telecommunications Research Institute (ETRI) Robust Ranging Algorithm for UWB Radio Electronics and Telecommunications Research Institute (ETRI) Seokyeong University Republic of Korea
Outline Proposed Algorithm Proposed algorithm flow & summary Comparisons of complexities with MERL and I2R Simulations for CM1 Simulations for CM8 Conclusions
Proposed Algorithm BPF SNR Increase Convert Time to Frequency ( )2 LPF / 1-4ns integrator ADC Add few Frames & Compute Energy FFT Convert Time to Frequency High Resolution Algorithm SNR Increase Compute Energy TOA Estimator
Other Architectures for Comparison BPF ( )2 LPF / 2-4ns integrator ADC "Path-arrival dates" table 1D to 2D Conversion Assumption path synchronization Matrix Filtering + Assumption/path selection Time base 1-2ns accuracy Time stamping Analog comparator FT R&D TOA Estimator Sliding Correlator Energy combining across symbols interference suppression 1D-2D Conversion 2D-1D Conversion Energy image generation Bipolar template I2R 1D to 2D Conversion Length-3 Vertical Median or Minimum Filtering Removes interference 2D to 1D Conversion with Energy Combining Energy image generation MERL
Proposed Algorithm Flow Algorithm based High Resolution TOA Finding the Subspace Finding Spectrum Finding TOA
Proposed Algorithm Summary Required Operation: Correlation FFT Comparison Complexity (N: No. of Energy Block) R: N point Correlation FFT: N point FFT Noise Subspace: N point scalar and vector multiplication Peak Finding: N point comparison
Complexity of the Proposed Algorithms N = 32 Accumulation of signals (Preamble symbols-1) x 31 chip sequences adds. 992 op. (= 32 x 31, assuming preamble symbols is 31) N point FFT (Two FFTs) 2x(N/2)log2N complex mults. 2xNlog2N complex additions 960 op. (=2x80 complex mults= 2x4x80 real mults. + 2x2x80 real adds.) 640 op. (= 2x160 complex adds. = 2x320 real adds.) Correlation (3 times) 3xN*N real multiplication 3xN*(N-1) real addition 3072 op. (=3x1024 real mults.) 2976 op. (= 3x992 real adds.) Noise Subspace N complex multiplication 192 op. (=128 real mults. + 64 real adds.) Finding Peaks N-1 Comparison 31 comparisons Total Operations 8863 op. Memory size N 32
Complexity of Algorithm by MERL N = 32 N x N image* (N-2 x N-2) x 32 rearrange operations 8100 op. (= 30 x 30 x 32) 2D to 1D conversion (Preamble symbols-1) x 31 chip sequences adds. 992 op. (= 31 x 32) Total operation 9092 op. Memory size N x N = N2 1024 - Complexity Ratio = Proposed/MERL = 8863/9092 = 97.5% -> Almost same * Sorting (3 point Median Filtering) = 32 rearrange operations = (Compare & allocation) = 9
Complexity of Algorithm by I2R N = 32 Sliding Correlation N*N real adds. 1024 real adds. N/2 x N image sliding correlation x 31 chip sequences 31744 op. (= 1024 x 31) 2D to 1D conversion (Preamble symbols-1) x 31 chip sequences adds. 465 op. (= 15 x 31) Total operation 32209 op. (= 31744+465) Memory size Preamble symbols x 31 chip sequences 496 (= 16 x 31) - Complexity Ratio = Proposed/I2R = 8863/32209 = 27.4% -> less than I2R
Simulation Parameters for CM1 CM1 Channel considered Ts = 1ns SNR 8~22dB 10 Frames are accumulated. Three High Resolution Algorithms Compare with MERL True TOA = 10
Simulation Results SNR 8dB True TOA True TOA
Simulation Results SNR 8dB High Resolution TOA VS MERL True TOA
Simulation Results SNR 9dB True TOA True TOA
Simulation Results SNR 9dB High Resolution TOA VS MERL True TOA
Simulation Results SNR 14dB True TOA True TOA
Simulation Results SNR 14dB High Resolution TOA VS MERL True TOA
Simulation Results SNR 17dB True TOA True TOA
Simulation Results SNR 17dB High Resolution TOA VS MERL True TOA
Simulation Results SNR 22dB True TOA True TOA
Simulation Results SNR 22dB High Resolution TOA VS MERL True TOA
Simulation Parameters for CM8 CM8 Channel considered Window length = 64 Ts = 1ns SNR 10~22dB 5 Frames are accumulated. High Resolution Algorithms Compare with MERL True TOA = 10
Simulation Results SNR 10dB True TOA
Simulation Results SNR 10 dB High Resolution TOA VS MERL True TOA
Simulation Results SNR 11dB True TOA
Simulation Results SNR 11 dB High Resolution TOA VS MERL True TOA
Simulation Results SNR 13dB
Simulation Results SNR 13dB High Resolution TOA VS MERL
Simulation Results SNR 17dB
Simulation Results SNR 17dB High Resolution TOA VS MERL
Conclusions Advantages Future work Low complexity and high performance Low memo High performance for low SNR and SINR Can be applied to Coherent system Small TOA estimation error (by CM8 simulation) Independent to signal waveform Future work Need comprehensive simulation Consider the SOP environment