Hardware Building Blocks

Slides:



Advertisements
Similar presentations
CSCI-1680 Physical Layer Link Layer I Based partly on lecture notes by David Mazières, Phil Levis, John Jannotti Rodrigo Fonseca.
Advertisements

1 Chapter 2 Agenda Announcements / updates Gayle Laakman McDowell, 10/11, 4:30pm, UW2-005 GUIs / IDEs for remotely accessing uw1-320-lab Other references.
Lecture 3, 1Spring 2003, COM1337/3501CCN: Direct Link Networks Direct Link Networks Textbook: Computer Networks: A Systems Approach, L. Peterson, B. Davie,
Spring 2002CS 4611 Outline Encoding Framing Error Detection Sliding Window Algorithm Point-to-Point Links.
CSCI 4550/8556 Computer Networks Comer, Chapter 7: Packets, Frames, And Error Detection.
Fundamentals of Computer Networks ECE 478/578 Lecture #3: Encoding and Framing Instructor: Loukas Lazos Dept of Electrical and Computer Engineering University.
1 Outline Encoding Framing Error Detection Sliding Window Algorithm Point-to-Point Links.
The OSI Reference Model
1 Hardware Building Blocks Five Issues –Encoding –Framing –Error Detection –Reliable delivery –Access Mediation Direct Link Networks.
Spring 2004 EE4272 Direct Link Networks (I) Hardware Building Blocks (nodes & links) 5 Issues before Exchanging Packets  Encoding  Framing  Error Detection.
Spring 2003CS 4611 Outline Encoding Framing Error Detection Sliding Window Algorithm Point-to-Point Links.
CS 164: Slide Set 3: Chapter 2 Direct Link Networks.
18-Aug-154/598N: Computer Networks Overview Direct link networks –Error detection - Section 2.4 –Reliable transmission - Section 2.5.
CompSci 356: Computer Network Architectures Lecture 4: Link layer: Encoding, Framing, and Error Detection Xiaowei Yang
CS 640: Introduction to Computer Networks Aditya Akella Lecture 5 - Encoding and Data Link Basics.
EE 122: Encoding And Framing Ion Stoica September 9, 2002.
CSCI-1680 Physical Layer Based partly on lecture notes by David Mazières, Phil Levis, John Jannotti Rodrigo Fonseca.
CSE331: Introduction to Networks and Security Lecture 3 Fall 2002.
CSS CSS432 Point-to-Point Links Textbook Ch2.1.2 – 2.5 Professor: Munehiro Fukuda.
Error Coding Transmission process may introduce errors into a message.  Single bit errors versus burst errors Detection:  Requires a convention that.
CHAPTER 2 HARDWARE BUILDING BLOCK ENCODING FRAMING ERROR DETECTION.
Advanced Computer Networks Chapter 2: Direct Link Networks.
Lecture 6: Framing and Error Detection-Data Link Layer Functions
27-Oct-15Computer Networks1 Outline Chapter 2: Direct Link Networks Encoding Framing Error Detection Sliding Window Algorithm Point-to-Point Links.
Layer Two Data Link Layer Collects bits from layer 1 and organizes into frames Passes bits that make up frames to layer 1 for transmission Concerned with.
Fall 2000Datacom 11 Outline Hardware Building Blocks Encoding Framing Error Detection Sliding Window Algorithm Point-to-Point Links.
1 CHAPTER 2 HARDWARE BUILDING BLOCK ENCODING FRAMING ERROR DETECTION.
Link Layer Dr. Mozafar Bag-Mohammadi Ilam University.
CSCI-1680 Physical Layer Based partly on lecture notes by David Mazières, Phil Levis, John Jannotti Rodrigo Fonseca.
Computer Networks Lecture 2: Data Link Based on slides from D. Choffnes Northeastern U. and P. Gill from StonyBrook University Revised Autumn 2015 by S.
Spring 2001CS 5851 Outline Building Blocks Shannon’s Theorem Encoding 11. Physical Layer.
9-Jan-164/598N: Computer Networks Overview Performance metrics - Section 1.5 Direct link networks –Hardware building blocks - Section 2.1 –Encoding - Section.
Point-to-Point Links: Framing
1 Chapter 2: Direct Link Networks (Part One) Dr. Rocky K. C. Chang 30 January 2004.
1 Hardware Building Blocks Five Issues –Encoding –Framing –Error Detection –Reliable delivery –Access Media Direct Link Networks.
1 Point-to-Point Links: Encoding Encoding: Section 2.2 (Section 2.1 read on your own)
Network Layer4-1 Chapter 5: The Data Link Layer Our goals: r understand principles behind data link layer services: m error detection, correction m sharing.
CS4470 Computer Networking Protocols
Simple Parity Check The simplest form of error detection is the parity check used with ASCII codes, originally on asynchronous modem links Each 7 bit ASCII.
Getting Connected (Chapter 2 Part 1)
The University of Adelaide, School of Computer Science
Data Link Networks Hardware Building Blocks Nodes & Links CS380
Data Link Layer Objective: to achieve reliable and efficient communication between 2 adjacent machines Data link layer design issues services provided.
Data Link Layer.
Part III. Data Link Layer
Advanced Computer Networks
Advanced Computer Networks
CIS 321 Data Communications & Networking
CSCI-1680 Physical Layer Link Layer I
Part III Datalink Layer 10.
CSS432 Point-to-Point Links Textbook Ch2.1 – 2.5
Packetizing Error Detection
Packetizing Error Detection
2. Getting connected (part 1)
Reliable transmission
Point-to-Point Links Outline Encoding Framing Error Detection
Ion Stoica September 6, 2001 EE 122: Lecture 4 Ion Stoica September 6, 2001.
Data Link Layer Objective: to achieve reliable and efficient communication between 2 adjacent machines Data link layer design issues services provided.
Error Detection Neil Tang 9/26/2008
Packetizing Error Detection
Data Link Layer Objective: to achieve reliable and efficient communication between 2 adjacent machines Data link layer design issues services provided.
COMPUTER NETWORKS CS610 Lecture-5 Hammad Khalid Khan.
Fundamentals of Computer Networks
Dr. Mozafar Bag-Mohammadi Ilam University
Home work project #1 Develop and fully debug your program on the Cushing 208 lab. Machines - planet lab machines may not have good development environment.
Data Link Layer: Overview; Error Detection
Error detection: Outline
EECS 122: EE122: Error Detection and Reliable Transmission
Data Link Layer. Position of the data-link layer.
Presentation transcript:

Hardware Building Blocks Data Link Networks Hardware Building Blocks Nodes & Links CS565 Data Link Networks

PROBLEM: Physically connecting Hosts 5 Issues 4 Technologies Encoding - encoding for physical medium Framing - delineation of bit stream Error Detection - identify frame errors Reliable Delivery - link integrity despite errors Media Access Control - multiple host access Point-to-point Links CSMA (Carrier Sense Multiple Access) - Ethernet - IEEE 802.3 Token Ring - FDDI - IEEE 802.5 Wireless - IEEE 802.11 Network Card CS565 Data Link Networks

Nodes general-purpose computers; e.g., desktop workstations, special- purpose hardware, PC CPU Network Cache (T o network) adaptor Finite memory Connects to network via a network adaptor Fast processor, slow memory I/O bus Memory CS565 Data Link Networks

Network Node Memory Moore’s Law Doubling processor speeds in 18 months Memory Latency Only 7% improvement each year Network nodes run at memory speeds, not CPU speeds Memory accesses needed to be considered carefully Two scarce resources: bandwidth and memory CS565 Data Link Networks

Links Electromagnetic Spectrum CS565 Data Link Networks

Links Sometimes you install your own Sometimes leased from the phone company (Note: T1 also called DS1, STS-1 also called OC-1) Data Link Networks CS565

Last-Mile Links From home to the network service provider. Service Bandwidth POTS (Plain Old Telephone Service) ISDN (Integrated Services Digital Network) xDSL (Digital Subscriber Line) CATV (CAble TV) 28.8-56 Kbps 64-128 Kbps 16 Kbps-55.2Mbps 20-40 Mbps CS565 Data Link Networks

Point-to-Point Links Encoding Framing Error Detection Reliable Transmission CS565 Data Link Networks

Encoding Signals propagate over a physical medium modulate electromagnetic waves by varying the voltage Network adaptor handles encoding Encoded bits to signals (sending) Decodes signals to bits (receiving) CS565 Data Link Networks

Adaptors Signal travel between signalling components; Node Adaptor Adaptor Node Bits Signal travel between signalling components; Bits flow between adaptors CS565 Data Link Networks

Modem and Codec Modem = Modulator + Demodulator Codec = Encoder + Decoder Encoder Modulator Demodulator Decoder Media CS565 Data Link Networks

NRZ Encoding Encode binary data onto signals e.g., 0 as low signal and 1 as high signal known as Non-Return to zero (NRZ) Problem: Consecutive 1s or 0s Low signal (0) may be interpreted as no signal High signal (1) leads to baseline wander Unable to recover clock Bits NRZ 1 CS565 Data Link Networks

Alternative Encodings Non-return to Zero Inverted (NRZI) make a transition from current signal to encode a one; stay at current signal to encode a zero solves the problem of consecutive ones Manchester transmit XOR of the NRZ encoded data and the clock only 50% efficient. CS565 Data Link Networks

Encodings (cont) 4B/5B every 4 bits of data encoded in a 5-bit code Symbol 5-bit Code 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 11110 01001 10100 10101 01010 01011 01110 01111 10010 10011 10110 10111 11010 11011 11100 11101 4B/5B every 4 bits of data encoded in a 5-bit code 5-bit codes selected to have no more than one leading 0 and no more than two trailing 0s thus, never get more than three consecutive 0s resulting 5-bit codes are transmitted using NRZI achieves 80% efficiency Others: 11111 – idle 00000 – dead … CS565 Data Link Networks

Encodings (cont) Bits NRZ Clock Manchester NRZI 1 CS565 1 CS565 Data Link Networks

Framing Central challenge - Use different protocols Frames Bits Adaptor Node B Node A Packet-switched networks Break sequence of bits into frames (blocks of data) What set of bits constitute a frame? Where the frame begins? Where the frame ends? Typically implemented by network adaptor Adaptor fetches (deposits) frames out of (into) host memory Central challenge - Use different protocols CS565 Data Link Networks

Framing Protocol Byte-oriented View each frame as a collection of bytes (characters) Sentinel approach BISYNC (Binary Synchronous Communication) protocol - IBM Byte counting DDCMP ( Digital Data Communication Message Protocol) protocol - DEC Bit-oriented HDLC (High-Level Data Link Control) Protocol – IBM and then ISO Clock-based SONET (Synchronous Optical Network) – Bellcore and then ANSI CS565 Data Link Networks

Byte-Oriented - Sentinel Approach Frame begins at SYN (Synchronization) Sentinel values between body STX = Start of text ETX = End of text CRC (Cycle Redundancy Check) – checks for errors BISYNC frame format (Binary Synchronous Communication) – IBM problem: ETX character might appear in the data portion of the frame solution: Character stuffing – Escape the ETX character with a DLE (data line escape) character in BISYNC 8 8 8 8 8 16 SYN SYN SOH STX ETX Header Body CRC CS565 Data Link Networks

Byte-Oriented – Byte-Counting Approach COUNT field specifies how many bytes contained in a frame DDCMP frame format ( Digital Data Communication Message Protocol) - DEC 8 8 8 14 42 16 SYN SYN Class Count Header Body CRC CS565 Data Link Networks

Bit-Oriented Denote the beginning/end of a frame with the distinguished bit sequence 0111110 HDLC frame format (High-level Data Link Control) – IBM and then ISO problem: the pattern 01111110 could appear anywhere in the body of the frame solution: Bit Stuffing - When it is located in the body, it is preceded with an escape sequence of bits (like an escape character in C) 8 16 16 8 Beginning Ending Header Body CRC sequence sequence CS565 Data Link Networks

Clock-Based each frame is 125s long  At STS-1 (= 51.84 Mbps) rate, 810B long e.g., SONET: Synchronous Optical Network ITU standard for transmission over fiber STS-n (STS-1 = 51.84 Mbps) c - concatenated Each frame is 810 bytes long Data Link Networks CS565

Error Long history of dealing with bit errors Hamming Reed/Solomon Detecting Error is only one part of the problem, the other part is correcting errors Two methods of error correction Have the message retransmitted Error-correcting codes (algorithms that all the recipient to reconstruct the correct message) CS565 Data Link Networks

Error Detection Basic idea – add extra (redundant) bits to a frame that can be used to determine if errors have been introduced. Ethernet: 1500B data requires only 32-bits (CRC-32) Sender applies algorithm to the message to come up with the extra bits Receiver uses the same algorithm to check if the calculation comes up with the same result Common error-detecting codes Two-dimensional parity (ASCII) (link-level) Checksum (internet) (not link-level) CRC, Cyclic Redundancy Check, (link-level) CS565 Data Link Networks

Two-Dimensional Parity 0101001 1 Catch all 1,2,3-bit and most 4-bit errors In this example, use 14 redundant bits for a 42-bit message, which is much better than the obvious way of sending two copies of the same data 1101001 1011110 1 Used by BISYNC protocol (IBM) to transmitting ASCII characters Data 0001110 1 0110100 1 1011111 Parity 1111011 byte Parity bits CS565 Data Link Networks

Internet Checksum Algorithm Not used in link-level (unlike parity and CRC) Sender adds up all the word and then transmit the result of that sum (Checksum) Received adds up all the words and compares its checksum to the sender’s checksum Algorithm for the Internet Treat the data as a sequence of 16-bit integers. Add the 16-bit integers using 16-bit ones complement arithmetic take the ones complement of the result. That 16-bit number is the checksum. CS565 Data Link Networks

CRC - Cyclic Redundancy Check Add k bits of redundant data to an n-bit message want k << n e.g., Ethernet: k = 32 and n = 12,000 (1500 bytes) Represent n-bit message as n-1 degree polynomial e.g., MSG=10011010 as M(x) = x7 + x4 + x3 + x1 Let k be the degree of some divisor polynomial e.g., C(x) = x3 + x2 + 1 when k = 3 CS565 Data Link Networks

CRC - Cyclic Redundancy Check Transmit polynomial P(x) that is evenly divisible by C(x) shift left k bits, i.e., M(x)xk subtract remainder of M(x)xk / C(x) from M(x)xk Receiver polynomial P(x) + E(x) (E(x) – error in the transmission) E(x) = 0 implies no errors Divide (P(x) + E(x)) by C(x); remainder zero if: E(x) was zero (no error), or E(x) is exactly divisible by C(x) CS565 Data Link Networks

CRC Example: k=3 M(x)xk Perform logical XOR Original Message M(x) 11111001 Generator C(x) 1101 10011010000 Message & k bits of 0 M(x)xk 1101 1001 Perform logical XOR Once the reminder is obtained, subtract it from M(x)xk, this can be accomplished with the XOR 10011010000 – 101 = 10011010101 Send this message Recipient divides received message by C(x), if the reminder is 0  no error (most likely) 1101 1000 1101 1011 1101 1100 1101 1000 1101 101 Remainder M(x)xk / C(x) CS565 Data Link Networks

Selecting C(x) All single-bit errors, as long as the xk and x0 terms have non-zero coefficients. All double-bit errors, as long as C(x) contains a factor with at least three terms Any odd number of errors, as long as C(x) contains the factor (x + 1) Any ‘burst’ error (i.e., sequence of consecutive error bits) for which the length of the burst is less than k bits. Most burst errors of larger than k bits can also be detected CS565 Data Link Networks

Common CRC Divisor Polynomials CRC-8 (ATM) CRC-10 (ATM) CRC-12 CRC-16 CRC-CCITT (HDLC) CRC-32 (Ethernet) C(x) x8+x2+x1+1 x10+x9+x5+x4+x1+1 x12+x11+x3+x2+x1+1 x16+x15+x2+1 x16+x12+x5+1 x32+x26+x23+x22+x16+x12+x11+x10+x8+x7+x5+x4+x2+x+1 CS565 Data Link Networks