Single bit comparator Single bit comparator 4/10/2007 DSD,USIT,GGSIPU

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Single bit comparator Single bit comparator 4/10/2007 DSD,USIT,GGSIPU gr: a(1) >a(0) A(1) sm: a(1) <a(0) A(0) eq: a(1)=a(0) 4/10/2007 DSD,USIT,GGSIPU

Truth table A(1) A(0) Gr Sm Eq 1 4/10/2007 DSD,USIT,GGSIPU

Boolean equation Gr <= a(1) and (not a(0)) Le <= a 4/10/2007 DSD,USIT,GGSIPU

VHDL Code 4/10/2007 DSD,USIT,GGSIPU entity singlebitcomparator is Port ( a : in std_logic_vector(1 downto 0); en: in std_logic; gt : out std_logic; sm : out std_logic; eq : out std_logic); end singlebitcomparator; architecture Behavioral of singlebitcomparator is begin process (en,a) if (a(1)>a(0)) then gt <= '1'; sm <= '0'; eq <= '0'; elsif (a(1) < a(0)) then gt <= '0'; sm <= '1'; eq <= '0'; else gt <= '0'; sm <= '0'; eq <= '1'; end if; end process; end Behavioral; 4/10/2007 DSD,USIT,GGSIPU

Waveform of single bit comparator 4/10/2007 DSD,USIT,GGSIPU

4-bit comparator 4-bit comparator A B 4/10/2007 DSD,USIT,GGSIPU

Boolean equation for 4-bit comparator Let A=a3a2a1a0 Let B=b3b2b1b0 Intermediate signal : i3,i2,i1 and i0 AeqB= i3i2i1i0 AgtB = a3(b3bar)+i3a2(b2bar)+i3i2a1(b1bar)+i3i2i1a0(b0bar) AltB = Not(AeqB+AgtB) 4/10/2007 DSD,USIT,GGSIPU

VHDL code of 4-bit comp 4/10/2007 DSD,USIT,GGSIPU entity comp4bit is Port ( x : in std_logic_vector(3 downto 0); y : in std_logic_vector(3 downto 0); en: in std_logic; greater : out std_logic; smaller : out std_logic; equal : out std_logic); end comp4bit; architecture Behavioral of comp4bit is component singlebitcomparator is Port ( a : in std_logic_vector(1 downto 0); gt : out std_logic; sm : out std_logic; eq : out std_logic); end component singlebitcomparator; signal temp : std_logic_vector(10 downto 0); 4/10/2007 DSD,USIT,GGSIPU

greater <= temp(0) or temp(3) or temp(6) or temp(9); begin u1: singlebitcomparator port map(a(1)=>x(3),a(0)=>y(3),en=>en,gt=>temp(0),sm=>temp(1),eq=>temp(2)); u2: singlebitcomparator port map(a(1)=>x(2),a(0)=>y(2),en=>temp(2),gt=>temp(3),sm=>temp(4),eq=>temp(5)); u3: singlebitcomparator port map(a(1)=>x(1),a(0)=>y(1),en=>temp(5),gt=>temp(6),sm=>temp(7),eq=>temp(8)); u4: singlebitcomparator port map(a(1)=>x(0),a(0)=>y(0),en=>temp(8),gt=>temp(9),sm=>temp(10),eq=>equal); greater <= temp(0) or temp(3) or temp(6) or temp(9); smaller <= temp(1) or temp(4) or temp(7) or temp(10); end Behavioral; 4/10/2007 DSD,USIT,GGSIPU

Waveform of 4-bit comparator 4/10/2007 DSD,USIT,GGSIPU