Self-cooling on power MOSFET using n-type Si wafer

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Presentation transcript:

Self-cooling on power MOSFET using n-type Si wafer ECT2011 Sep. 28-30, 2011 – Thessaloniki, GREECE Self-cooling on power MOSFET using n-type Si wafer H.Nakatsugawa, T.Sato, Y.Okamoto, T.Kawahara, and S.Yamaguchi E-mail : naka@ynu.ac.jp Yokohama National University, National Defense Academy, Chubu Uiversity Today I would like to talk about “Self-cooling on power MOSFET using n-type Si wafer”. My name is Hiroshi Nakatsugawa from Yokohama National University.

The n-type Si wafer is one of the candidate materials for use to cool down the power devices both by the thermal conduction and by the Peltier effect. This is the take home message that the n-type Si wafer is one of the candidate materials for use to cool down the power devices both by the thermal conduction and by the Peltier effect. Introduction

silicon power devices Metal Oxide Semiconductor Field Effect Transistors Insulated Gate Bipolar Transistors Central Processing Units Emitter I’m going to begin my talk by giving you a brief background of power devices. As you know, silicon power devices that include power MOSFET, IGBT and CPU are used in a daily life. When we use these devices, the improvement of heat removal or cooling is one of the most important issues because they will not function correctly above 150℃. Source Collecter Drain Gate Gate Introduction

Peltier heat dissipation power device cooling CPU cooling heat dissipation fan CPU fin power device fin There are three different ways to remove the heat from power devices. One is to use fin connected with power devices. This cooling system uses only thermal conduction. But the size of fin is larger than that of power device. The second way is to use Peltier module connected with large fin and fan. This cooling system uses only Peltier heat flux. However, the electric power consumption will be increased because Peltier module, fan and power devices need different DC power supplies for each operation. Peltier module Introduction Peltier heat dissipation

copper plating n-type Si wafer Conventional cooling system Self-cooling device 6W 7~8W 60A 60A current current power devices n-type TE materials D S G 1.5cm 3cm 520μm The third way is to use self-cooling device proposed by Yamaguchi et al. in four years ago. This cooling system applies both thermal conduction and Peltier heat by using self-current in this device. The point is that this cooling system consists of n-type thermoelectric material connected to drain for the power MOSFET. power MOSFET (IRF1324PbF) RDS(On)=1.5mΩ (VGS=10V, ID<195A) copper plating n-type Si wafer Joule heat @60A = 0.94W

a high Seebeck coefficient a high electrical conductivity The purpose of this study is to develop the self-cooling device using n-type thermoelectric material and to estimate the heat flux both by thermal conduction and by Peltier effect. a high Seebeck coefficient a high electrical conductivity a high thermal conductivity The purpose of this study is to develop the self-cooling device using n-type thermoelectric material and to estimate the heat flux both by thermal conduction and by Peltier effect. It is necessary that thermoelectric materials for self-cooling device have not only a high Seebeck coefficient and a high electrical conductivity but also a high thermal conductivity. So, for example, single crystal silicon must be one of the candidate materials for self-cooling device. Introduction

Au Ti Cu plate Si electric resistivity of n-type Si Seebeck coefficient of n-type Si 1μm Ti 0.1μm Au 0.4μm Cu plate Si 1μm In fact, the commercial n-type silicon wafer was used for self-cooling device because of a low electrical resistivity and a high Seebeck coefficient. The n-type silicon wafer was coated on both surfaces with 0.1 micro meter of titanium to endure adhesion and 0.4 micro meter of gold, deposited by sputtering. The electrodes were fabricated on both surfaces with a thickness of about 2 micro meter deposited by copper plating. SEM image of copper plating Si EPMA micrographs of copper plating Si Experimental

1.5cm 3cm 520μm ID=60A VGS=10V water cooled heatsink D S G upper side TVS-200EX (NEC Avio ) The power MOSFET and the copper plating n-type silicon wafer were located between upper and lower copper block. In this system, the electric current of 60A flowed from lower to upper direction. The water temperature of the heatsink was maintained about 4℃ constantly by the cooling water circulation system. To determine whether the self-cooling device remove the heat from the power MOSFET, we studied the time dependence of the temperature distribution by using the infra-red thermography. ID=60A VGS=10V CA-1112 (EYELA) water cooled heatsink Experimental 8

Results and Discussion 6W 30 minutes 40 minutes 60A current 32.4℃ 32.9℃ 50 minutes 60 minutes These figures show the temperature distribution of Joule heat from power MOSFET after 30, 40, 50 and 60 minutes. The temperature distributions of the upper side are in the range 27 to 36℃. In particular, the temperature distributions show the peak of the pixel value at about 33℃. This means that the average temperature of the upper side in this system is about 33℃. This figure shows the time dependence of the Joule heat and the input power. The Joule heat is measured 6W constantly, and also the input power is measured 48W constantly. 33.4℃ 32.7℃ Joule heat Results and Discussion

Results and Discussion 30 minutes 40 minutes 7~8W 60A current 32.2℃ 32.2℃ 50 minutes 60 minutes These figures show the temperature distribution of the Joule heat from power MOSFET with the n-type silicon wafer after 30, 40, 50 and 60 minutes. The temperature distributions show the peak of the pixel value at about 32℃. In particular, the increase of the input power and the output power is about 4W constantly. It is assumed that both the Joule heat and the Peltier heat generate, so that the heat removal can be explained reasonably. If the increase of 4W is due to the Joule heat, the temperature distribution should be enhanced higher temperature. Therefore, the Peltier heat should make a contribution to cool down the power MOSFET with n-type silicon wafer. 32.9℃ 32.4℃ Peltier heat Joule heat Results and Discussion

summary The self-cooling device was developed and was estimated heat flux both by thermal conduction and by Peltier effect. The average temperature of upper side of power MOSFET was cooled down by addition of the n-type Si wafer. The n-type Si wafer is one of the candidate materials for use in the self-cooling device. To summarize, we developed the self-cooling device and estimated heat flux both by thermal conduction and by Peltier effect. We revealed that the average temperature of upper side of power MOSFET was cooled down by addition of the n-type Si wafer. We conclude that the n-type Si wafer is one of the candidate materials for use in the self-cooling device. summary

Thank you for your kind attention. Acknowledgements Thank you for your kind attention. Thank you for your kind attention.

current 6W 30 minutes 40 minutes 60A 50 minutes 60 minutes 2.6V 2A 31.3℃ 32.8℃ 50 minutes 60 minutes 2.6V 2A 2.6V 8W 7 ℃ 33.8℃ 35.0℃ 2A 13W 27℃ Imax=6A, Vmax=8.3V Introduction Peltier module (KSM-06071C) Results and Discussion

Peltier module (KSM-06071C) 8V 20W 7 ℃ 6A 68W 27℃ 2.5V 8W 7 ℃ 2A 13W 27℃ Imax=6A, Vmax=8.3V Introduction Peltier module (KSM-06071C)

30 minutes 40 minutes 60A 14.6℃ 15.7℃ 14.6℃ 50 minutes 14.1℃

30 minutes 40 minutes 1~2W 60A 50 minutes Peltier heat Joule heat 13.1℃ 60A 16.7℃ 50 minutes 13.1℃ Peltier heat Joule heat

Results and Discussion 30 minutes 7~8W 40 minutes 60A current 35.0℃ 35.0℃ 50 minutes 60 minutes 2.6V 2A 34.4℃ 34.4℃ Results and Discussion