1/1/ / faculty of Electrical Engineering eindhoven university of technology Managing complex designs Workshop on VLSI Design Using the Interactive Design and Simulation System dr.ir. Ad C. Verschueren

1/1/ / faculty of Electrical Engineering eindhoven university of technology Contents The problem with complex designs Generating readable and usable documentation Debugging complex designs

1/1/ / faculty of Electrical Engineering eindhoven university of technology Complex design problems The main problem with complex designs: – how to keep (or give) an overview of the design – how to document design decisions Needed for: – the individual designer (extending, debugging) – design teams (transferring knowledge, interfaces) – future designs (re-use by other designers)

1/1/ / faculty of Electrical Engineering eindhoven university of technology Add comments and generate documents IDaSS offers the following basic functionality: – capability to add textual comments: USE THIS! in textual specifications or comment window – capability to generate textual documentation customisable, includes all comments – capability to export schematics as graphics Planned but not included yet: – importing schematics in existing schematic symbol – version and library management

1/1/ / faculty of Electrical Engineering eindhoven university of technology Readability and documentation hints Use short & informative names, NO acronyms – blocks:DATASTACK – connectors & buses:mainInput – commands:AddWithCarry Keep schematics clean, structured & compact Comment functionality and implementation – blocks:function, behaviour and interface – buses:function and bitfields (if any) – text specs:overview at start, details embedded

1/1/ / faculty of Electrical Engineering eindhoven university of technology Building and using libraries Any block (incl. subschematic) can be filed out – easy to create library, needs manual management – only makes sense if well-documented! – be careful with hidden interfaces (commands) Saved subschematic can become new system Saved blocks can be loaded in schematic – also works with complete saved designs

1/1/ / faculty of Electrical Engineering eindhoven university of technology Debugging complex systems Basic state information visible with viewers – very limited (and fixed) functionality – looses overview with multiple schematics IDaSS provides probe sets to help here – central windows displaying probed values user-defined grouping and descriptive names – values can come from all over the system probes can test abstract values (functions, states) value tests may be combined with expressions – possible to set breakpoints or warning points

1/1/ / faculty of Electrical Engineering eindhoven university of technology Generating simulation trace files Extra functionality of probe sets: write probed values to a text file Text file format is not fixed – defined in log file description (.lfd) files – lots of possible uses by this flexibility logging problems during an overnight simulation run generating test environments for converted designs …or test vector files for controlling ASIC testers Planned: reading a trace file for comparison

1/1/ / faculty of Electrical Engineering eindhoven university of technology Probe set workshop Create a probe set in communic.des top-level Add two probes showing the OUT reg values – attachments described like test in state controller Add a probe which shows the ARBITER state – this is one of the special tests, use help window! Add a probe indicating both OUT regs written – display a warning message when this happens Generate an example log file and inspect...