MIPS assembly.

Slides:



Advertisements
Similar presentations
1 Lecture 3: MIPS Instruction Set Today’s topic:  More MIPS instructions  Procedure call/return Reminder: Assignment 1 is on the class web-page (due.
Advertisements

Lecturer PSOE Dan Garcia
CENG 311 Decisions in C/Assembly Language
Goal: Write Programs in Assembly
Lecture 5: MIPS Instruction Set
MIPS assembly. Review  Lat lecture, we learnt  addi,  and, andi, or, ori, xor, xori, nor,  beq, j, bne  An array is stored sequentially in the memory.
CPS3340 COMPUTER ARCHITECTURE Fall Semester, /15/2013 Lecture 11: MIPS-Conditional Instructions Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER.
MIPS processor continued. Review Different parts in the processor should be connected appropriately to be able to carry out the functions. Connections.
ECE 15B Computer Organization Spring 2010 Dmitri Strukov Lecture 5: Data Transfer Instructions / Control Flow Instructions Partially adapted from Computer.
Chapter 2 Instructions: Language of the Computer
Computer Architecture CPSC 321 E. J. Kim. Overview Logical Instructions Shifts.
1 Lecture 2: MIPS Instruction Set Today’s topic:  MIPS instructions Reminder: sign up for the mailing list cs3810 Reminder: set up your CADE accounts.
Lecture 5 Sept 14 Goals: Chapter 2 continued MIPS assembly language instruction formats translating c into MIPS - examples.
ECE 15B Computer Organization Spring 2010 Dmitri Strukov Lecture 6: Logic/Shift Instructions Partially adapted from Computer Organization and Design, 4.
Data Transfer & Decisions I (1) Fall 2005 Lecture 3: MIPS Assembly language Decisions I.
IT253: Computer Organization Lecture 5: Assembly Language and an Introduction to MIPS Tonga Institute of Higher Education.
ITEC 352 Lecture 14 ISA(6). Review Questions? Beginning / End Memory locations Variable / Memory syntax PSR Loops / Branches.
1 Branches and Procedure Calls Lecture 14 Digital Design and Computer Architecture Harris & Harris Morgan Kaufmann / Elsevier, 2007.
Chapter 10 The Assembly Process. What Assemblers Do Translates assembly language into machine code. Assigns addresses to all symbolic labels (variables.
CSCI-365 Computer Organization Lecture Note: Some slides and/or pictures in the following are adapted from: Computer Organization and Design, Patterson.
Lecture 4: MIPS Instruction Set
IFT 201: Unit 1 Lecture 1.3: Processor Architecture-3
True Assembly Language Part I. The Assembly Process The process of translating a MAL code (an assembly language program) into machine code (a sequence.
MIPS coding. Review Shifting – Shift Left Logical (sll) – Shift Right Logical (srl) – Moves all of the bits to the left/right and fills in gap with 0’s.
Chapter 2 Decision-Making Instructions (Instructions: Language of the Computer Part V)
Computer Architecture CSE 3322 Lecture 3 Assignment: 2.4.1, 2.4.4, 2.6.1, , Due 2/3/09 Read 2.8.
Computer Organization Instructions Language of The Computer (MIPS) 2.
Computer Organization CS224 Fall 2012 Lessons 7 and 8.
COM181 Computer Hardware Lecture 6: The MIPs CPU.
CS Computer Organization Numbers and Instructions Dr. Stephen P. Carl.
COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Yaohang Li.
CSCI-365 Computer Organization Lecture Note: Some slides and/or pictures in the following are adapted from: Computer Organization and Design, Patterson.
MIPS Instruction Set Advantages
CS2100 Computer Organisation
COMPUTER ARCHITECTURE & OPERATIONS I
MIPS Coding Continued.
Lecture 4: MIPS Instruction Set
Computer Architecture & Operations I
Conditional Branches What distinguishes a computer from a simple calculator is its ability to make decisions Decisions are made using the if statement,
Instructions for Making Decisions
The University of Adelaide, School of Computer Science
MIPS coding.
Lecture 4: MIPS Instruction Set
ARM Control Structures
MISP Assembly.
How to represent signed integers
Logical and Decision Operations
Computer Architecture & Operations I
MIPS Processor.
MIPS Instruction Encoding
ECE232: Hardware Organization and Design
MIPS coding.
MIPS Functions.
MIPS Instruction Encoding
Lecture 5: Procedure Calls
MIPS coding.
Review.
MIPS Assembly.
Flow of Control -- Conditional branch instructions
3.
COMS 361 Computer Organization
ARM Control Structures
MIPS Assembly.
Flow of Control -- Conditional branch instructions
MIPS Coding Continued.
MIPS coding.
7/6/
MIPS Processor.
MIPS instructions.
Conditional Branching (beq)
Presentation transcript:

MIPS assembly

Review We learned An array is stored sequentially in the memory addi, and, andi, or, ori, xor, xori, nor, An array is stored sequentially in the memory The instructions are also stored sequentially in the memory. Executing the code is to load then execute the instructions one by one, unless we encounter a branch condition.

5/3/2019 Shifts Shift instructions move all the bits in a word to the left or to the right Shift left logical (sll) move all the bits to the left by the specified number of bits sll $t2, $t0, 2 Shift right logical (srl) move all the bits to the right srl $t2, $t0, 2 Filling the emptied bits with 0’s This includes srl with negative numbers (since you insert 0’s to the left of the number, your number will be positive after the shift) 5/3/2019 CDA3100 CDA3100

Example 1 Suppose register $s0 ($16) is 9ten 5/3/2019 Example 1 Suppose register $s0 ($16) is 9ten What do we have in $t2 ($10) after 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 5/3/2019 CDA3100 CDA3100

Example 1 Suppose register $s0 ($16) is 9ten 5/3/2019 Example 1 Suppose register $s0 ($16) is 9ten We have in $t2 ($10) after The value is 144ten = 9ten  24 In general, shifting left by i bits gives the same result as multiplying by 2i 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 5/3/2019 CDA3100 CDA3100

Example 2 Suppose register $s0 ($16) is 9ten 5/3/2019 Example 2 Suppose register $s0 ($16) is 9ten What do we have in $t2 ($10) after 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 5/3/2019 CDA3100 CDA3100

Example 2 Suppose register $s0 ($16) is 9ten 5/3/2019 Example 2 Suppose register $s0 ($16) is 9ten We have in $t2 ($10) after The value is NOT 9ten  228 noting that the number is a signed number. Overflow happens this time 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 5/3/2019 CDA3100 CDA3100

Example 3 Suppose register $s0 ($16) is 99ten 5/3/2019 Example 3 Suppose register $s0 ($16) is 99ten What do we have in $t2 ($10) after srl $t2, $s0, 4 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 5/3/2019 CDA3100 CDA3100

Example 3 Suppose register $s0 ($16) is 99ten 5/3/2019 Example 3 Suppose register $s0 ($16) is 99ten We have in $t2 ($10) after srl $t2, $s0, 4 The value is 6ten = 99ten / 24 In general, shifting left by i bits gives the same result as dividing by 2i 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 5/3/2019 CDA3100 CDA3100

Example 4 Suppose register $s0 ($16) is -9ten 5/3/2019 Example 4 Suppose register $s0 ($16) is -9ten What do we have in $t2 ($10) after srl $t2, $s0, 4 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 5/3/2019 CDA3100 CDA3100

Example 4 Suppose register $s0 ($16) is -9ten 5/3/2019 Example 4 Suppose register $s0 ($16) is -9ten We have in $t2 ($10) after srl $t2, $s0, 4 The value is NOT -9ten / 24 noting that the number is a signed number. Even though it’s a negative number, 0’s are filled in during shift 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 5/3/2019 CDA3100 CDA3100

Instructions for Making Decisions 5/3/2019 Instructions for Making Decisions A distinctive feature of programs is that they can make different decisions based on the input data 5/3/2019 CDA3100 CDA3100

Instruction beq (branch if equal) 5/3/2019 Instruction beq (branch if equal) To support decision making, MIPS has two conditional branch instructions, similar to an “if” statement with a goto In C, it is equivalent to Note that L1 is a label and we are comparing values in register1 and register2 Label is an address of an instruction. Every address can be associated with a label, which is used by the assembly program to specify the address Go to a label means that fetch that instruction from the memory and execute it. 5/3/2019 CDA3100 CDA3100

5/3/2019 Instruction bne Similarly, bne (branch not equal) means go to the statement labeled with L1 if the value in register1 does not equal to the value in regster2 Equivalent to 5/3/2019 CDA3100 CDA3100

5/3/2019 Instruction j (jump) MIPS has also an unconditional branch, equivalent to goto in C Jump to the instruction labeled with L1 5/3/2019 CDA3100 CDA3100

Compiling if-then-else 5/3/2019 Compiling if-then-else Suppose variables f, g, h, i, and j are in registers $s0 through $s4, how to implement the following in MIPS? 5/3/2019 CDA3100 CDA3100

Compiling if-then-else 5/3/2019 Compiling if-then-else Suppose variables f, g, h, i, and j are in registers $s0 through $s4, how to implement the following in MIPS? 5/3/2019 CDA3100 CDA3100

Compiling if-then-else 5/3/2019 Compiling if-then-else Suppose variables f, g, h, i, and j are in registers $s0 through $s4, how to implement the following in MIPS? 5/3/2019 CDA3100 CDA3100

MIPS Assembly for if-then-else 5/3/2019 MIPS Assembly for if-then-else Now it is straightforward to translate the C program into MIPS assembly 5/3/2019 CDA3100 CDA3100

Exercise 1 Suppose $t0 is storing 30, $t1 is storing 20. After the following instructions, what will be the value in $t2? sub $t2, $t0, $t1 srl $t2, $t2, 2 ori $t2, $t2, 10   (a) 8 (b)10 (c)18 (d) None of the above. 30-20=10=1010. srl =10, or with 10 becomes 10. So. (b)

Exercise 2 Suppose word array A stores 0,1,2,3,4,5,6,7,8,9, in this order. Assume the starting address of A is in $s0. After the following instructions, what will be the value in $t0? addi $s0, $s0, 32 lw $t0, 4($s0) andi $t0, $t0, 1   (a) 0 (b) 8 (c) 9 (d) None of the above. (d) 1

Exercise 3 If $t0 is holding 17, $t1 is holding 8, what will be the value stored in $t2 after the following instructions? andi $t0, $t0, 3 beq $t0, $0, L1 addi $t0, $t0, 1 L1: add $t2, $t0, $t1   (a) 10. (b) 8. (c) 2. (d) None of the above. Answer: a.

Exercise 4 Assume A is an integer array with 10 elements storing 0,1,2,3,4,5,6,7,8,9. Assume the starting address of A is in $s0 and $t0 is holding 3. After the running the following code, what will be the content of $t0? sll $t0, $t0, 3 add $t0, $s0, $t0 lw $t0, 0($t0) srl $t0, $t0, 1   (a) 3 (b) 1 (c) 0 (d) None of the above. Answer: a.

In Class Exercise If-Else