Semiconductor Device Modeling & Characterization Lecture 19

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Semiconductor Device Modeling & Characterization Lecture 19 Professor Ronald L. Carter ronc@uta.edu Spring 2001 L19 March 27

Gummel-Poon Static npn Circuit Model Intrinsic Transistor B RBB ILC IBR ICC - IEC = IS(exp(vBE/NFVt) - exp(vBC/NRVt)/QB B’ ILE IBF RE E L19 March 27

Gummel Poon npn Model Equations IBF = IS  expf(vBE/NFVt)/BF ILE = ISE  expf(vBE/NEVt) IBR = IS  expf(vBC/NRVt)/BR ILC = ISC  expf(vBC/NCVt) ICC - IEC = IS(exp(vBE/NFVt - exp(vBC/NRVt)/QB QB = { + [ + (BFIBF/IKF + BRIBR/IKR)]1/2 }  (1 - vBC/VAF - vBE/VAR )-1 L19 March 27

VAR Parameter Extraction (rEarly) iE iB vEC vBC 0.2 < vEC < 5.0 0.7 < vBC < 0.9 Reverse Active Operation iE = - IEC = (IS/QB)exp(vBC/NRVt), where ICC = 0, and QB-1 = (1-vBC/VAF-vBE/VAR ) {IKR terms }-1, so since vBE = vBC - vEC, VAR = iE/[iE/vBE]vBC L19 March 27

Reverse Early Data for VAR At a particular data point, an effective VAR value can be calculated VAReff = iE/[iE/vBE]vBC The most accurate is at vBE = 0 (why?) vBC = 0.85 V vBC = 0.75 V iE(A) vs. vEC (V) L19 March 27

Reverse Early VAR extraction VAReff = iE/[iE/vBE]vBC VAR was set at 200V for this data When vBE = 0 vBC=0.75VAR=200.5 vBC=0.85VAR=200.2 vBC = 0.75 V vBC = 0.85 V VAReff(V) vs. vEC (V) L19 March 27

BJT Characterization Reverse Gummel vBEx= 0 = vBE + iBRB - iERE vBCx = vBC +iBRB +(iB+iE)RC iB = IBR + ILC = (IS/BR)expf(vBC/NRVt) + ISCexpf(vBC/NCVt) iE = bRIBR/QB = ISexpf(vBC/NRVt) (1-vBC/VAF-vBE/VAR ) {IKR terms }-1 iE RC iB RE RB vBCx vBC vBE + - L19 March 27

Reverse Gummel Data Sensitivities c Region a - IKRIS, RB, RC, NR, VAF Region b - IS, NR, VAF, RB, RC Region c - IS/BR, NR, RB, RC Region d - IS/BR, NR Region e - ISC, NC vBCx = 0 a d e iB b iE iE(A),iB(A) vs. vBC(V) L19 March 27

Sample rg data for parameter extraction IS=10f Nr=1 Br=2 Isc=10p Nc=2 Ikr=.1m Vaf=100 Rc=5 Rb=100 iB data iE data iE, iB vs. vBCext L19 March 27

VAF Parameter Extraction (fEarly) Forward Active Operation iC = ICC = (IS/QB)exp(vBE/NFVt), where ICE = 0, and QB-1 = (1-vBC/VAF-vBE/VAR ) {IKF terms }-1, so since vBC = vBE - vCE, VAF = iC/[iC/vBC]vBE iC iB vCE vBE 0.2 < vCE < 5.0 0.7 < vBE < 0.9 L19 March 27

Forward Early Data for VAF At a particular data point, an effective VAF value can be calculated VAFeff = iC/[iC/vBC]vBE The most accurate is at vBC = 0 (why?) vBE = 0.85 V vBE = 0.75 V iC(A) vs. vCE (V) L19 March 27

Forward Early VAf extraction VAFeff = iC/[iC/vBC]vBE VAF was set at 100V for this data When vBC = 0 vBE=0.75VAR=101.2 vBE=0.85VAR=101.0 vBE = 0.75 V vBE = 0.85 V VAFeff(V) vs. vCE (V) L19 March 27

Definitions of Neff and ISeff In a region where iC or iB is approxi-mately a single exponential term, then iC or iB ~ ISeffexp (vBCext /(NReffVt) where Neff = {dvBCext/d[ln(i)]}/Vt, and ISeff = exp[ln(i) - vBCext/(NeffVt)] L19 March 27

Simple extraction of NR, NC from rg data Data set used Nr = 1 Nc = 2 Flat Neff region from iE data = 1.00 for 0.195 < vBC < 0.375 Max Neff value from iB data is 1.914 for 0.195 < vBC < 0.205 iB data iE data NEeff vs. vBCext L19 March 27

Simple extraction of IS, ISE from data Data set used IS = 10fA ISC = 10pA Min ISeff for iE data = 9.96E-15 for vBC = 0.200 Max ISeff value for iB data is 8.44E-12 for vBC = 0.200 iB data iE data ISeff vs. vBCext L19 March 27

Simple extraction of BR from data Data set used Br = 2 Extraction gives max iE/iB = 1.7 for 0.48 V < vBC < 0.55V 1.13A < iE < 14.4A Minimum value of Neff =1 for same range iE/iB vs. iE L19 March 27

Ideal 2-terminal MOS capacitor/diode conducting gate, area = LW Vgate -xox SiO2 y L silicon substrate tsub Vsub x L19 March 27

Band models (approx. scale) metal silicon dioxide p-type s/c Eo Eo Eo qcox ~ 0.95 eV qcSi= 4.05eV qfm= 4.1 eV for Al Ec qfs,p Eg,ox ~ 8 eV EFm Ec EFp EFi Ev Ev L19 March 27

Flat band condition (approx. scale) SiO2 p-Si q(fm-cox)= 3.15 eV q(cox-cSi)=3.1eV Ec,Ox qffp= 3.95eV EFm Ec Eg,ox~8eV EFi EFp Ev Ev L19 March 27

Equivalent circuit for Flat-Band Surface effect analogous to the extr Debye length = LD,extr = [eVt/(qNa)]1/2 Debye cap, C’D,extr = eSi/LD,extr Oxide cap, C’Ox = eOx/xOx Net C is the series comb C’Ox C’D,extr L19 March 27

Accumulation for Vgate< VFB -xox SiO2 EOx,x<0 holes p-type Si tsub Vsub = 0 x L19 March 27

Accumulation p-Si, Vgs < VFB Fig 10.4a* L19 March 27

Equivalent circuit for accumulation Accum depth analogous to the accum Debye length = LD,acc = [eVt/(qps)]1/2 Accum cap, C’acc = eSi/LD,acc Oxide cap, C’Ox = eOx/xOx Net C is the series comb C’Ox C’acc L19 March 27

Depletion for p-Si, Vgate> VFB -xox SiO2 EOx,x> 0 Depl Reg Acceptors p-type Si tsub Vsub = 0 x L19 March 27

Depletion for p-Si, Vgate> VFB Fig 10.4b* L19 March 27

Equivalent circuit for depletion Depl depth given by the usual formula = xdepl = [2eSi(Vbb)/(qNa)]1/2 Depl cap, C’depl = eSi/xdepl Oxide cap, C’Ox = eOx/xOx Net C is the series comb C’Ox C’depl L19 March 27

Inversion for p-Si Vgate>VTh>VFB Vgate> VFB EOx,x> 0 e- e- e- e- e- Depl Reg Acceptors Vsub = 0 L19 March 27

Inversion for p-Si Vgate>VTh>VFB Fig 10.5* L19 March 27

Approximation concept “Onset of Strong Inv” OSI = Onset of Strong Inversion occurs when ns = Na = ppo and VG = VTh Assume ns = 0 for VG < VTh Assume xdepl = xd,max for VG = VTh and it doesn’t increase for VG > VTh Cd,min = eSi/xd,max for VG > VTh Assume ns > 0 for VG > VTh L19 March 27

MOS Bands at OSI p-substr = n-channel Fig 10.9* L19 March 27

References * Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997. L19 March 27