Digital Modeling/Implementation of Valve Amplifiers Cody Frye & Mitchell Gould

Agenda Introduction Motivation System Description Methods Preliminary Results Hardware Implementation Consideration Bill of Materials Schedule of Work

Introduction

Introduction Significance of valve amplifiers Pros of valve amplifiers Smooth clipping Warm tone characteristics Cons of valve amplifiers Weight Heat Cost

Motivation Affordable, Cheap, and Convenient Multiple Amplifiers to choose from No Analog Components for reduced Component Size

System Description

System Description The Preamp, Gain, Tone and Output blocks will be modeled according the schematic found online Each block will be the WDF equivalent of the analog components making up the circuitry

Pre-Amplification Stage

Gain Stages

Tone Stack

Output Driver

Methods Frequency Bin / Lookup Table Method Model Individual Blocks of System Wave Digital Filtering

Method 1 (Frequency Bin Method) ...

Method 1 (Frequency Bin Method) Separate input signal into Multiple frequency bins bandPass Filters NonLinear transfer function represented by L.U.T.s Sum all the bins together

Method 2 (Wave Digital Filters) WDF Binary Tree for Triode Amplifier WDF triode Stage (example) Binary Tree by Matti Karjalainen and Jyri Pakarinen

WDF Method Continued Wave quantities A = incident wave B = reflected wave

WDF Method Continued WDF 3 port adapters WDF components

Preliminary Results Filter banks design High order bandpass filters Difficult to implement in real-time Not a sufficient method

Preliminary Results Simulated a RC High Pass Filter Time Domain results using chirp signal (left) Frequency Domain results (right)

High Pass Filter WDF Equivalent Two Port Parallel Adapter Analog RC High Pass Filter Three Port Series Adapter

High Pass Filter (WDF)

Preliminary Results (Triode Valve) Nonlinear Triode Currents as a Function of Vgk and Vpk Triode Amplifier Model of Triode

Preliminary Results (Triode Valve) Leach’s Model Equations Norman Koren’s Model Equations

Preliminary Results (Leach’s model) Vpk = 350 Vgk = 2 Vpk = 300 Vpk = 250 Vgk = 1 Vpk = 200 Vpk = 150 Vgk = 0 Vgk = -1 Vpk = 100 Vpk = 50 Vpk = 0 Vgk = -2 Vgk = -3

Preliminary Results (Koren’s model) Vgk = 1 Vpk = 300 Vpk = 250 Vpk = 200 Vpk = 150 Vgk = 0 Vpk = 100 Vpk = 50 Vpk = 0 Vgk = -1 Vgk = -2 Vgk = -3

Hardware Implementation Consideration Zynq 7000 FPGA/ARM Processor System on Chip (SoC) Audio codec Mikroe-506 Audio Codec Board WM8731 IC 44.1kHz Sample Rate Stereo inter -IC sound (i2s) protocol

Bill of Materials Mikroe-506 Audio Codec Board - $19.38 Digilent PYNQ Board - $229.00 ¼” female adaptors - (2) $0.86 per piece Crate Blue Voodoo 120 Valve Amplifier - $239.00 used

Schedule Dates Task Assigned Too 1/19 - 2/2 Tone-stack WDF design/simulation Cody 2/3 - 2/16 Triode valve WDF design/simulation Mitchell 2/17 - 3/2 Pentode valve WDF design/simulation 3/3 - 3/16 Gain Stage WDF design 3/17 - 3/30 Overall Simulation 4/6 - 4/20 FPGA Hardware Configuration/Implementation 4/21 - 5/4 Student Expo and Final Presentation

Conclusion Aims to digitally emulate Analog Circuitry of a valve amplifier using WDF Implement on an zynq SOC device Utilize i2s protocol