Presented by Jiossy Rami Electing a Leader in Synchronous Ring GREG N. FREDERICKSON NANCY A. LYNCH Presented by Jiossy Rami

Agenda Background Problem description What’s new in this work? Lower bound proof outline Definitions and Model introduction Lower bound proof

Background Leader Election Message Complexity Unidirectional Rings Lennan’s: WorstCase=AvgCase=O(n2) Change and Roberts: WorstCase=O(n2) , AvgCase=O(n logn) Peterson: WorstCase=O(n logn) Bidirectional Rings Franklin: WorstCase=O(n logn) Complete networks with sense of direction: O(n) PKR: Ω(n logn) , asynchronous, n isn’t known.

Problem description N (n) identical processors, with unique IDs. Synchronous bidirectional ring. Lower bound here applies to unidirectional too. Processors can awake at different times. No processor wakes up after receiving a message. N is known to the processors. Lower bound here applies to case where N isn’t known.

What’s new in this work? Greg N. Frederickson Nancy A. Lynch

What’s new in this work? Linear leader election can be achieved if IDs are chosen from a countable set. (possibly integers) In this paper it is demonstrated by introducing such a leader election algorithm. Ω(n logn) when only comparison allowed.

Model Abstract IDs are chosen from arbitrary ID space –X. ( |X|>N ) Processors have state Processor state records exactly its initial ID and history of received messages. Certain states are designated as ‘leader’ states. Processors begin at the same time. Worst case when considering complexity.

Model Abstract Execution Initialization: Round step: Each processor state includes it’s ID only. Round step: Processor examines its state and decides if to send message to each of its neighbors or not. Each sent message contains the sender processor entire state. Processor receives messages from its neighbors, if any.

Well-formed S-expression over X S-expression (commonly used in Lisp) Representation of structured data. Example from Lisp: (1 . (2 . (3 . nil))) Well-formed S-expression: Element of X (S1,S2,S3): S2 is well-formed S1,S3 each is well-formed or the atom NIL.

Well-formed S-expression over X S-expressions S, S’ are order-equivalent if: S,S’ have the same structure. For any two atoms in S, their corresponding two atoms in S’, satisfy the same relation with respect to <, =, >. Let F(X) denote set of all well-formed S-expressions over X.

Free Algorithm An algorithm having well-formed S-expressions state and working according to the above introduced model, is named a Free Algorithm. Initially is state contains self ID only. Sent message contains sender state only. Processor starts a round with state S, and ends it with state (S1,S,S2) S1 /S2 records message from ccw/cw processor. E is a closed set of ‘leader’ states U is a transport function: F(X) x {cw,ccw} -> { yes , no }

Comparison algorithm An algorithm is a comparison algorithm provided that, if s and s’ are order-equivalent well-formed S-expressions over X, then: s and s’ send messages in the same direction. U(s,cw) = U(s’, cw) U(s,ccw) =U(s’,ccw) s and s’ have the same election status. s is in E exactly if s’ is in E.

Execution Modeling Ring Configuration ( c ): Ordered N- tuple of processors states. Ring Message vector ( v ): Ordered N- tuple of pairs over F(x)U{NIL} Execution ( e ): Sequence of (c1,v,c2) Second configuration in each sequence must be the same as the first configuration in the subsequent sequence.

Ring segments K-segment Execution fragment Sequence of k consecutive processors in the ring in clockwise order. Execution fragment Prefix of some execution (starts at round 0) Two segments S, T are order equivalent in R, in case the sequences of IDs are order-equivalent.

Chain in segment Clockwise chain in e for (S,T) is a subsequence of the steps ei1,ei2,…,eik where: ei1 == true if when ei1 executes, either p-1 sends message to p OR q-1 sends message to q. ei2 == true if when ei2 executes, either p sends message to p+1 OR q sends message to q+1. … eik == true if when eik executes, either p+k-2 sends message to p+k-1 OR q+k-2 sends message to q+k-1.

Chain in segment maxcw(e) maxccw(e) sum(e) = maxcw(e) + maxccw(e) maximum k for which there are order-equivalent length k-segments S and T (possibly S=T) where e contains clockwise chain for (S,T). maxccw(e) Analogous to maxcw(e) sum(e) = maxcw(e) + maxccw(e) |e|=0 (empty) then sum(e)=maxcw(e)=maxccw(e)=0

Ring bisegment (k1,k2)-bisegment is defined to be a pair of segments, the first of size k1 and the second of size k2, which overlap in one processor. (end of first is start of the second) Duplicate processor is named center.

Ring bisegment Spanning-segment is the concatination of k1,k2 segment while removing the duplication. Two bisegments are order-equivalent if their spanning segments are order-equivalent. We denote p's (k1,k2)-bisegment as the (k1,k2) bisegment centered at p. p and q are (k1,k2) equivalent if their (k1,k2) bisegments are order equivalent.

Chain in bisegment S=(S1, S2),T=(T1,T2) are two (k1,k2)-bisegments. Clockwise chain in e for (S,T) is a clockwise chain in e for (S1,T1). A counterclockwise chain in e for (S,T) is a counterclockwise chain in e for (S2,T2). There is a chain in e for (S,T) of either there is clockwise or a counterclockwise chain in e for (S,T).

Congruent States S,T are two K-segments s,t are congruent with respect to S,T if: s,t are structurally equivalent. corresponding positions in s and t contain elements from corresponding positions in S,T. S,T are two (k1,k2)-bisegments. s,t are congruent with respect to S,T if: s,t are congruent to the spanning-segments of S,T.

Congruent States A=(x1,x2,…,xk) s = ((…),(xi…)) B=(y1,y2,…,yk) t = ((…),(yi…)) Definition: s,t who are structurely equivalent, are said to be congruent with respect to A,B if: if xi and yi are from the same positions in s,t then: if xi is the k-th element of A then yi is also the k-th element of B. Example: A = (1,3,18,4,6), B =(11,4,2,9,5) s = (nil,(3,18,4),(1,3,18)), t=(nil,(4,2,9),(11,4,2)) s,t are congruent states

Lower bound proof

Lower bound proof outline The absence of long enough chains implies certain processors remain indistinguishable. If chains are short and there are lots of equivalent processors, any message that gets sent has many corresponding messages sent at the same time by other processors. Chains can grow by at most 1 in any time step. Introduce ID assignment which achieves a large amount of replication symmetry.

maxcw(e)<=maxcw(e')+1 maxccw(e)<=maxccw(e')+1 Proof: maxcw(e)/maxccw(e) maximum k for which there are order-equivalent length k-segments S and T (possibly S=T) where e contains a clockwise/counterclockwise chain for (S,T). Lemma3: Let e be an execution fragment in ring R. Assume e' is a prefix of e except the last step, then: maxcw(e)<=maxcw(e')+1 maxccw(e)<=maxccw(e')+1 Proof: Let S,T be order-equivalent and e is a clockwise chain in (S,T). Let S',T' be the prefix with length |e|-1 of S,T correspondingly, then: S',T' are order equivalent Since e' is e without the last sent message, we conclude that e' is a chain in (S',T') Since |S|=|T|=|e| we get that maxcw(e')>=maxcw(e)-1.

Indistringuishability Lemma4: Let e be an execution fragment in ring R. Let p,q be two (k1,k2) order-equivalent processors in R, and Let S,T be their respective (k1,k2)-bisegments. If there are no chains in e for (S,T), then at the end of e, the states of p and q are congruent with respect to (S,T). 

Indistringuishability Proof: Induction on |e|. Base: |e| = 0: s,t are empty so they are congruent. Step: Assume it holds for any length < |e| and any values of k1,k2. Let e' denote e except the last step. By the inductive assumption, p,q are congruent with respect to S,T by the end of e'. Name the neighbors as …,p', p , p'',... And …,q', q , q'',....

Case1: (p'',q'' is analogous) Case1: (p'',q'' is analogous) p',q' are congruent with respect to (S,T) by the end of e'. Lets consider p',q'. Case1: (p'',q'' is analogous) p',q' are congruent with respect to (S,T) by the end of e'. p' and q' will take a similar decision in the last step of e so they will send their congruent states and p,q will remain in congruent states just after e. 

Case2: (p'',q'' is analogous) Case2: (p'',q'' is analogous) p',q' are not congruent with respect to (S,T) and they don't send message at the last step of e. Case2: (p'',q'' is analogous) p',q' are not congruent with respect to (S,T) and they don't send message at the last step of e. By the inductive assumption, p,q are already congruent with respect to (S,T) prior to the last step of e. In this case they don't receive any message from p',q' correspondingly, so their congruency is not being affected.

Case3: (p'',q'' is analogous) Case3: (p'',q'' is analogous) p',q' are congruent are not congruent and at least one of them sends message at last step of e. Case3: (p'',q'' is analogous) p',q' are congruent are not congruent and at least one of them sends message at last step of e. Assume K1>1. (otherwise there is a clockwise chain in e) p',q' are (k1-1,k2+1)-equivalent. Let S',T' denote their respective (k1-1,k2+1)-bisegments. S',T' are composed from the same set of processors S,T are built from.

Case3: (p'',q'' is analogous) p',q' are congruent are not congruent and at least one of them sends message at last step of e. By the inductive assumption, their must be a chain in e' with respect to S',T'. Counterclockwise chain: We obtain a counterclockwise chain in e for S,T. Contradiction Clockwise chain: At least one of p',q' send a clockwise message in the last step of e, we obtain a clockwise chain in e for (S,T). Contradiction

Corollary5 Corollary 5: Assume in ring R, each k-segment has at least i order-equivalent k-segments. Let e be an execution fragment and e' is its prefix except the last step. Assume sum(e')<k. Then, if some processor p sends a message clockwise (or counterclockwise) at last step, then there are at least I processors that do the same. Proof: Let k1=maxcw(e')+1 Let k2=maccw(e')+1

Corollary5 k1 k2 p maxccw(e’) maxcw(e’) (k1,k2)-bisegment of p has at most k elements, hence it has at least i (k1,k2)-equivalent processors. Let q be any one of these processors, and let S and T be the (k1,k2)-bisegments centered at p and q, respectively.

Corollary5 By the definition of maxcw, maxccw, there cannot be a chain in e' for (S,T). k1 k2 S p maxccw(e’) maxcw(e’) k1 k2 T q maxccw(e’) maxcw(e’)

Corollary5 By Lemma4, p,q will remain congruent with respect to (S,T) at the end of e'. Since we consider a comparison algorithm, q also sends a message clockwise at the last step.

Corollary6 Corollary 6: Let R be a ring where every k-segment S has another order-equivalent k-segment T. Let e be an execution fragment of a comparison algorithm which elects a leader in R, then sum(e)>=k.  Proof: Assume on the contrary, that sum(e)=maxcw(e)+maxccw(e) < k Let k1=maxcw(e)+1 Let k2=maxccw(e)+1

Corollary6 The (k1,k2)-bisegment of p which becomes leader, has at most k elements -> p has a (k1,k2)-equivalent processor q. Let S,T be their (k1,k2)-bisegment centered at p,q respectively. By the definition of maxcw, maxccw, there cannot be a chain in e for (S,T).

Corollary6 By Lemma4, p,q will remain congruent by the end of e with respect to (S,T). Since we consider comparison algorithm p,q cannot be distinguished for leadership.

Lower bound for N power of 2 Assume N (n) is power of 2. We introduce an assignment of IDs which exhibits a large amount of replication symmetry. Assume processor indexes P0,P1,…,Pn-1. For integer i, denote reverse(i) as: Integer who's binary representation is the reverse of i's binary representation.

Lower bound for N power of 2 Q<n> labeling: ID[Pi] = reverse(i)  i=1: 000001 -> reverse(i) = 100000 i=2: 000010 -> reverse(i) = 010000 Important observation: The i-th high order bits decide order in segment. N = 23=8: 000 001 010 011 100 101 110 111 000 100 010 110 001 101 011 111 Q<n> Length = 2i=22

Lower bound for N power of 2 Lemma7: if a ring R is labeled with Q labeling, and S is a segment of length at most 2i where i<log(n), then there are at least n/2i order-equivalent segments in R for S (including S).  Proof: In a segment of length at most 2i ., each ID differs from all others in its i-th high order bits.

Lower bound for N power of 2 If considering some processor P with id=IDx in some segment, then the processor q which is far from p by distance 2i, will have identical values for the i-th high order bits. So, any segment that is order equivalent to S will have its first processor at a distance that is multiple of 2i from the first processor of S. There are such n/2i segments (including S).

Lower bound for N power of 2 Theorem: Assume N is a power of 2. Let A be a comparison based leader election algorithm over the arbitrary ID space X. A operates in synchronous ring of size n. There is an execution of A for (n/2)*(logn+1) messages are sent.

Lower bound for N power of 2 Proof: Consider ID space X with Q<n> ordering. Let e be the execution fragment which elects a leader. By Lemma7, every segment of size n/2 has another order-equivalent segment. By corollary6, execution e must have sum(e)>= n/2. (increasing from 0) By Lemma3, the sum increases by at most 2 in any step (messages in both directions) and by 1 which sending in one direction only.

Lower bound for N power of 2 Lets consider the first time e becomes larger than k=2i . Let e' be the prefix of e except the last step, then sum(e')<k=2i By Lemma7, and corollary5, if any message is sent clockwise at this step, then at least n/2i messages will be sent. Similarly for the counterclockwise . So if the sum increases by 1, then n/2i messages are sent, and if the sum increases by 2, then 2xn/2i messages will be sent.

Lower bound for N power of 2 Cost of increasing sum from 0 to n/2: n/2i for each increases from k to k+1. Increase from k to k+1 equals increase from 2i -1 to 2i At the beginning (20), all processors send messages

References Electing a leader in a synchronous ring Journal of the ACM (JACM), Volume 34 ,  Issue 1  (January 1987), Pages: 98 - 115  By GREG N. FREDERICKSON Purdue University. West Lafayette, Indiana NANCY A. LYNCH Massachusetts Institute of Technology, Cambridge, Massachusetts