SVT – SuperB Workshop – Frascati Sept. 2010 SVT- TDR preparation Layer0 Strategy Striplets baseline option for TDR: Better physics performance (lower material ~0.5% vs 1% hybrid pixel, MAPS or thin hybrid pixel in between but not yet mature!) Upgrade to pixel (Hybrid or CMOS MAPS), more robust against background, foreseen for a second generation of Layer0 SVT Mechanics will be designed to allow a quick access/removal of Layer0 Layer 1-5 Double sided strip detectors modules (up to 37 cm long) In the TDR full technical details needed for baseline: Layer0 with striplets Layer1-5 strip detector Describe the upgrade path for Layer0: Status of the R&D on pixel (hybrid, CMOS MAPS, 3D pixels) G. Rizzo SVT – SuperB Workshop – Frascati Sept. 2010

Questions I’ll try to answer Time estimate for conclusion of R&D and beam test resolution of outstanding technical issue detailed design and engineering drawings G. Rizzo SVT – SuperB Workshop – Frascati Sept. 2010

1. Conclusion of R&D and beam test Ongoing R&D activities concentrated on pixel options for Layer0 (upgrade). For the TDR (~end of 2011 ?) can report results on: Hybrid pixels development: single FE chip + sensor with bumpbonding & multichip pixel module. 3D CMOS MAPS (first vertical integration prototypes) Lab test + testbeam on single chips in Sept 2011 Pixel module support & cooling based on microchannels. R&D on thin pixels will continue after TDR phase VIPIX Italian Collaboration + specific SuperB ? Several groups strongly involved in these activities (BO, PI, PV/BG, RomaIII, MI, TS). G. Rizzo SVT – SuperB Workshop – Frascati Sept. 2010

2. Resolution of outstanding technical issue Readout chip for striplets / long strip module Previous candidate chip (FSSR2) not adequate: Not fast enough for layer0 with the increased back. rate expected Long modules in external layers needs long shaping time A new chip development is needed: triggered architecture with the analog cell redesigned. Analog cell design can be done by the PV/BG group. The involvement of a new group is mandatory for the development of the digital part (Fermilab?) With Fermilab (or equivalent group) involved ~ 8 months needed to define a solid proposal for the TDR (no time to realize a prototype!) G. Rizzo SVT – SuperB Workshop – Frascati Sept. 2010

3. Time estimate to have detailed design and engineering drawings Sensors: striplets & optimization of detectors models for L1-5: Trieste, ~ 8 months (L. Vitale) Readout chip: with the right group involved ~ 8 months. (V. Re) Work on system design (electr.) is continuing making “reasonable” assumption on the readout chip that will be used. Need to define the specs of the new chip soon! On detector electronics: Fanout/HDI/transition cards+links (Milano) 12 months to complete the activities with the right manpower available (contract for 1 eng that is leaving needed now!) (M. Citterio) DAQ: development of the SVT FEB (Bologna) Some of the work can be done only after a clear definition of some common SuperB components (FCTS, ECS, links). Design can be completed in ~ 10 months (M. Villa) G. Rizzo SVT – SuperB Workshop – Frascati Sept. 2010

SVT Mechanics for TDR (F. Bosi) Design of Layer 0 modules (striplets and pixel) & beam pipe covered and well advanced (Pisa). Need 6+2 months. Quick dismounting: activity just started ~ 4 months needed. Design of L1-L5 module & SVT support structure (cones, space-frame …) not started and not covered! 6+6 months needed. Manpower extremely critical: One man band! F. Bosi Need to add ~1.5 FTE mech eng. to complete the engineering of the system in 1 yr. G. Rizzo SVT – SuperB Workshop – Frascati Sept. 2010

SVT – SuperB Workshop – Frascati Sept. 2010 Manpower is an issue to complete the TDR by the end of 2011. Need to hire eng. (mech and electr) & get new groups involved to complete the activities (readout chip & full design of the “standard” L1-L5 strip detector!) G. Rizzo SVT – SuperB Workshop – Frascati Sept. 2010