Command and Data Handling Winkelman, Martin Jayaraman, Vijay Bhatia, Vishal

Introduction Command and Data Handling subsystem is responsible for computing and control of subsystem functions. The core of this subsystem is a single- board computer powered by the Intel PXA255 Processor with the PC/104 form factor.

System Functional Diagram FLIGHT COMPUTER General Purpose I/O Pins SERIAL PORTS +5v PC/104 USB POWER ADCS SCIENCE TIP-MASS MECHANISMS RS232 Serial I/O Board CPLD Serial to 802.11b bridge 802.11b TNC RADIO COMM THERMAL INTERFACE THERMAL INTERFACE THERMAL INTERFACE THERMAL

Design Changes Since PDR Externally triggered reset is no longer design requirement External watchdog provided by power system We will try to avoid multiplexing inputs if possible Additional 32MB flash memory needed Interface requirements have changed for some systems Serial link to 802.11b bridge now used for tip mass in place of using 802.11b card on computer Science will also be using a serial port Some systems have added analog and/or digital interface lines

Functional Requirements C&DH must not exceed 7 Watts. Maximum ½ kg. External watchdog timer. 3.8” x 3.6” x 4” profile Must run Linux 32MB RAM minimum 16MB FLASH + additional 32 MB FLASH

Interface Requirements System Digital Out Digital In Analog Out Analog In Other I/O ------ ----------- ---------- ---------- --------- --------- ADCS 3 0 3 9 Comm 0 0 0 0 2x serial Power 1 0 0 0 serial Mech 0 2 0 17 Science 1 1 0 0 serial + 2x USB Thermal 0 0 0 30 Tip Mass 0 0 0 0 serial TOTALS 5 3 3 56 5 serial, 2 USB

Design Compliance All digital I/O, serial, and USB ports are built in to Viper Additional flash memory will be installed in the CompactFlash socket Analog I/O will be provided by additional COTS board using PC/104 bus

Safety Requirements System is contained within a closed box System ground will be isolated from structure ground System is not active without power There are no high current inputs or outputs There are no moving parts

Arcom Viper PXA255 400Mhz CPU SDRAM: 64M FLASH: 16M 256K Battery Backed SRAM Real-Time Clock Watchdog Timer Interfaces: 2 USB v1.1 5 Serial Ports Compact Flash Drive Support Ethernet: 10/100BaseT JTAG 8 Digital In / 8 Digital Out PC/104

Specifications – Viper Overview Power Requirements: 1.6W @ + 5V only supply (typical) 200mW @ +5V (standby mode) Operating Temperature: -20°C to +70°C Weight: 96 Grams Form Factor: PC/104

PC/104 Module Form Factor

Design Details Current design anticipates using 3 industry standard PC/104 size boards. Analog Inputs/Outputs will be provided by a PC/104 expansion board. Custom circuitry, if necessary, will be simple, such as a multiplexor or thermistor driver.

Analysis and Prototyping Some software testing has already been done on Computer No prototyping necessary for COTS components as long as interface specifications are followed

COTS Parts Status Different options are still being evaluated TBD I/O boards 1 has been procured Arcom Viper Status Availability Part Lead time of less than 2 weeks

I/O Board Make or Buy Rationale Better selection of interface options High reliability components can be selected Buy Can fit more interfaces on a board Software implementation is much simpler Not much more expensive than fabricating custom board Conclusion: We will buy the I/O board

Manufacturing and Testing Constraints Boards connected using PC/104 mountings Wiring will be soldered to connectors Testing Most testing will be done with software simulation and readily available test equipment JTAG can be used to troubleshoot system hangs

Ground Support Equipment Requirements Power system must be integrated before C&DH integration A standard 5 volt power supply can be used when testing system before power is integrated Ethernet Port on Viper will be used for testing during integration The serial port can also be used for testing until the Comunications system is integrated

Documentation Design Review Test Plan Trade Studies Preliminary Design Review Peer Review Test Plan Outline for C&DH system Trade Studies Arcom Viper vs. other PC/104 computers To read over any of the following topics please go to http://spacegrant.colorado.edu/dino/CDH.htm

C&DH Schedule Interface Board Custom Hardware End of Semester Review March 15-19 Select and procure I/O board April 5-9 Testing Custom Hardware March 22-26 Determine if custom board is needed March 29 – April 2 Design and testing April 12-16 Testing End of Semester Review April 19 - 23 Integrate all boards together April 25 – May 10 Testing

Issues and Concerns Unknown effects of radiation on COTS parts Final choice for I/O board has not been made