Shift registers and Floating Point Numbers

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Presentation transcript:

Shift registers and Floating Point Numbers pp. 41-42, 358-371 in Carpinelli

What are they? Recall that a register is a small piece of memory that holds values In addition to holding values, a shift register performs a simple operation on the values; it moves them to the left to to the right

Example 1

Parallel loading register

Register On the previous slide, the input of a flip-flop is selected from two possible choices The output of the same flip-flop The data switch above Recall that selected from one of two inputs is done by a 2-to-1 MUX

Register  Shift Register We can adapt the previous circuit to make a shift register Instead of having one possible input for a flip-flop come from the output of the same flip-flop, we can change this to having one possible input for a flip-flop come from an adjacent flip-flop Then if we are not loading from the data switches and we go through a positive edge of the clock, the values in the flip-flops will shift

On the ends If one shifts from the right, to the left, then the input to the rightmost flip-flop does not come from an adjacent flip-flop during the shift operation. There are several options Data switch input Always 1 Always 0 Use leftmost output to form a ring

How are shift registers used? Modems Cyclic Redundancy Check (CRC) Multiplication Adding floats

Modems A modem (Modulator-Demodulator) takes a signal from a computer and places it on a transmission line A transmitting modem modulates, that is, converts a digital signal from a computer to a pseudo-analog signal more appropriate for a transmission line The receiving modem demodulates, that is, converts the pseudo-analog signal back into digital form

Modems (Cont.) But the aspect of modems relevant here is that The transmitting modem converts parallel data to serial The receiving modem converts serial data into parallel form Inside the computer, data that moves around as words (on parallel cables having a connection for each bit in the word) The transmission lines are longer and require data to be sent serially (one bit at a time)

Cyclic Redundancy Check In order to check for error that may occur during transmission, the sender calculates a number, a cyclic redundancy check. The receiver does the same calculation. If they agree, then presumably no error occurred in transmission. Actually the receiver does a calculation that includes the sender’s CRC as part of the data and should get an answer of zero. It’s easier electronically to see if series of bits corresponds to zero.

CRC Any mathematical operation performed on the transmitted data could serve as a check Another common calculation is summing, then it is called a checksum The calculation should not be time consuming Think of CRC as a funny kind of division, the remainder from the division is the check It’s not ordinary division, but a strange kind of division that is easy to realize electronically

CRC = Shift register + XORs Basically one has a shift register with a few excluded OR gates inserted in strategic positions.

Multiplication: Shift and add 1  + shift shift

Fractions Similar to what we’re used to with decimal numbers 3.14159 = 3 · 100 + 1 · 10-1 + 4 · 10-2 + 1 · 10-3 + 5 · 10-4 + 9 · 10-5 11.001001 = 1 · 21 + 1 · 20 + 0 · 2-1 + 0 · 2-2 + 1 · 2-3 + 0 · 2-4 + 0 · 2-5 + 1 · 2-6 (11.001001  3.140625)

Converting decimal to binary II 98.6 Integer part 98 / 2 = 49 remainder 0 49 / 2 = 24 remainder 1 24 / 2 = 12 remainder 0 12 / 2 = 6 remainder 0 6 / 2 = 3 remainder 0 3 / 2 = 1 remainder 1 1 / 2 = 0 remainder 1 1100010

Converting decimal to binary III 98.6 Fractional part 0.6  2 = 1.2 0.2  2 = 0.4 0.4  2 = 0.8 0.8  2 = 1.6 REPEATS .100110

Converting decimal to binary IV Put together the integral and fractional parts 98.6  1100010.1001100110011001

Scientific notation Used to represent very large and very small numbers Ex. Avogadro’s number  6.0221367  1023 particles  602213670000000000000000 Ex. Fundamental charge e  1.60217733  10-19 C  0.000000000000000000160217733 C

Floats SHIFT expression so it is just under 1 and keep track of the number of shifts 1100010.1001100110011001 .11000101001100110011001  27 Express the number of shifts in binary .11000101001100110011001  200000111

Mantissa and Exponent and Sign .11000101001100110011001  200000111 (Significand) Mantissa Exponent The number may be negative, so there a bit (the sign bit) reserved to indicate whether the number is positive or negative

Biasing Actually the exponent is not represented as shown on the previous slide There were 8 bits used to represent the exponent on the previous slide, that means there are 256 numbers that could be represented Since the exponent could be negative (to represent numbers less than 1), we choose half of the range to be positive and half to be negative , i.e. -128 to 127

Biasing (Cont.) In biasing, one does not use 2’s complement or a sign bit Instead one adds a bias (equal to the magnitude of the most negative number) to the exponents and represents the result of that addition

Biasing (Cont.) With 8 bits, the bias is 128 We had to shift 7 times to the left, corresponding to an exponent of +7 We add that to the bias 128+7=135 That is the number we put in the exponent portion: 10000111 (In the IEEE 754 format for floats, you bias by one less (127) and reserve the exponents 00000000 and 11111111 for special purposes.)

One more fine point As discussed so far, the mantissa (significand) always starts with a 1 When storage was expensive, designers opted not to represent this bit, since it is always 1 It had to be inserted for various operations on the number (adding multiplying, etc.), but it did not have to be stored